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RoHS
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Package 8-DIP (0.300, 7.62mm)
Category Integrated Circuits (ICs) / Clock/Timing - Delay Lines
Description SILICON DELAY LINE Nonprogrammable TIN LEAD CMOS delay line IC -40C~85C 5V 9ns 7.62mm
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Technical Details

Compliance

RoHS Status Non-RoHS Compliant

Dimensions

Width 7.62mm

Technical

Total Delay-Nom (td) 45 ns
Available Total Delays 45ns
Programmable Delay Line NO
Delay to 1st Tap 9ns
Number of Independent Delays 1
Number of Taps/Steps 5
Output Impedance 50Ohm
Logic IC Type SILICON DELAY LINE
Output Polarity TRUE
Qualification Status COMMERCIAL
Function Nonprogrammable
JESD-30 Code R-PDIP-T8
Time@Peak Reflow Temperature-Max (s) 20
Supply Voltage 5V
Peak Reflow Temperature (Cel) 240
Terminal Position DUAL
Voltage - Supply 4.75V~5.25V
Technology CMOS
Terminal Finish TIN LEAD
Number of Terminations 8
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Part Status Obsolete
Pbfree Code no
JESD-609 Code e0
Packaging Tube
Operating Temperature -40°C~85°C

Physical

Surface Mount NO
Package / Case 8-DIP (0.300, 7.62mm)
Mounting Type Through Hole

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