74LV573D,118
RoHS 
RoHS compliant
RoHS compliantPackage 20-SOIC (0.295, 7.50mm Width)
Category Integrated Circuits (ICs) / Logic - Latches
Description
74LV573 Tape & Reel (TR) LV/LV-A/LVX/H 74LV latch circuit 29ns 16mA 16mA 24ns 2.65mm
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Technical Details
Physical
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Surface Mount YES
Technical
Operating Temperature -40°C~125°C
Packaging Tape & Reel (TR)
Published 2009
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Terminal Finish NICKEL PALLADIUM GOLD
Additional Feature BROADSIDE VERSION OF 373
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV573
Pin Count 20
JESD-30 Code R-PDSO-G20
Qualification Status Not Qualified
Output Type Tri-State
Circuit 8:8
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Number of Ports 2
Number of Bits 8
Family LV/LV-A/LVX/H
Output Characteristics 3-STATE
Current - Output High, Low 16mA 16mA
Logic Type D-Type Transparent Latch
Output Polarity TRUE
Max I(ol) 0.008 A
Prop. Delay@Nom-Sup 29 ns
Independent Circuits 1
Delay Time - Propagation 24ns
Dimensions
Height Seated (Max) 2.65mm
Width 7.5mm
Compliance
RoHS Status ROHS3 Compliant
Alternative Model
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