SN74LV05ANS
RoHS
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Package 14-SOIC (0.209, 5.30mm Width)
Category Integrated Circuits (ICs) / Logic - Gates and Inverters
Description
Buffer 74LV05 8542.39.00.01 74LV logic gate circuit 7.5ns @ 5V 50pF 2mm - 12mA 5.5V
PDF
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Buying Options
Total Price: USD $1.16
Unit Price: USD $1.1616
≥1 USD $1.1616
≥10 USD $1.04104
≥100 USD $0.988064
≥500 USD $0.811536
Inventory: 219
Minimum: 1
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Technical Details
Supply Chain
Factory Lead Time 6 Weeks
Physical
Mounting Type Surface Mount
Package / Case 14-SOIC (0.209, 5.30mm Width)
Surface Mount YES
Technical
Operating Temperature -40°C~125°C
Packaging Tube
Series 74LV
JESD-609 Code e4
Feature Open Drain
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
HTS Code 8542.39.00.01
Subcategory Gates
Technology CMOS
Voltage - Supply 2V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 6
Supply Voltage 2.5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LV05
Pin Count 14
JESD-30 Code R-PDSO-G14
Qualification Status Not Qualified
Polarity Inverting
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 2V
Number of Circuits 6
Load Capacitance 50pF
Family LV/LV-A/LVX/H
Logic Function Buffer
Number of Inputs 1
Current - Output High, Low - 12mA
Logic Type Inverter
Max Propagation Delay @ V, Max CL 7.5ns @ 5V, 50pF
Prop. Delay@Nom-Sup 12 ns
Propagation Delay (tpd) 19.5 ns
Schmitt Trigger NO
Logic Level - Low 0.1V ~ 0.55V
Current - Quiescent (Max) 20μA
Dimensions
Height Seated (Max) 2mm
Length 10.2mm
Width 5.3mm
Compliance
RoHS Status RoHS Compliant
Lead Free Lead Free
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