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MC100LVEL12MNR4G

ON Semiconductor
RoHS
/
Package 8-VFDFN Exposed Pad
Category Integrated Circuits (ICs) / Logic - Gates and Inverters - Multi-Function, Configurable
Description Tin (Sn) NECL MODE: VCC = 0V WITH VEE = -3.0V TO -3.8V 100LVEL NOR/OR Gate multiple gates 0.5mm 0.58ns +-3.3V -40C~85C
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Technical Details

Physical

Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-VFDFN Exposed Pad

Technical

Operating Temperature -40°C~85°C
Packaging Tape & Reel (TR)
Published 2008
Series 100LVEL
JESD-609 Code e3
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 8
Terminal Finish Tin (Sn)
Additional Feature NECL MODE: VCC = 0V WITH VEE = -3.0V TO -3.8V
Subcategory Other Logic ICs
Technology ECL
Voltage - Supply -3V~-3.8V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 8
JESD-30 Code S-XDSO-N8
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.8V
Power Supplies +-3.3V
Supply Voltage-Min (Vsup) 3V
Number of Circuits 1
Logic Function Buffer, NOR, OR
Number of Inputs 2
Halogen Free Halogen Free
Logic Type NOR/OR Gate
Propagation Delay (tpd) 0.58 ns
Schmitt Trigger Input No

Compliance

RoHS Status RoHS Compliant
Lead Free Lead Free

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