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N74F112N,602

NXP USA Inc.
RoHS
RoHS RoHS compliant
Package 16-DIP (0.300, 7.62mm)
Category Integrated Circuits (ICs) / Logic - Flip Flops
Description COMPLEMENTARY Not Qualified Set(Preset) and Reset JK Type Flip Flop 0C~70C TA 21mA 50pF 4.5V~5.5V
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Technical Details

Physical

Mounting Type Through Hole
Package / Case 16-DIP (0.300, 7.62mm)
Surface Mount NO

Technical

Operating Temperature 0°C~70°C TA
Packaging Tube
Published 1999
Series 74F
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
Type JK Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology TTL
Voltage - Supply 4.5V~5.5V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 245
Supply Voltage 5V
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 74F112
Function Set(Preset) and Reset
Qualification Status Not Qualified
Output Type Differential
Number of Elements 2
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 5V
Supply Voltage-Min (Vsup) 4.5V
Load Capacitance 50pF
Clock Frequency 100MHz
Family F/FAST
Current - Quiescent (Iq) 21mA
Current - Output High, Low 1mA 20mA
Output Polarity COMPLEMENTARY
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 6.5ns @ 5V, 50pF
Trigger Type Negative Edge
Propagation Delay (tpd) 7.5 ns
fmax-Min 80 MHz
Max Frequency@Nom-Sup 80000000Hz

Compliance

RoHS Status ROHS3 Compliant

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