STM32L151RDY6TR
RoHS 
RoHS compliant
RoHS compliantPackage 64-UFBGA, WLCSP
Category Integrated Circuits (ICs) / Embedded - Microcontrollers
Description
MCU 32-bit STM32L ARM Cortex M3 RISC 384KB Flash 1.8V/2.5V/3.3V 64-Pin WLCSP T/R
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Buying Options
Total Price: USD $5.59
Unit Price: USD $5.592172
≥1 USD $5.592172
≥10 USD $15.4204
≥100 USD $14.93875
≥500 USD $14.4571
≥1000 USD $13.97545
Inventory: 1282
Minimum: 1
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Technical Details
Supply Chain
Factory Lead Time 10 Weeks
Lifecycle Status ACTIVE (Last Updated: 6 months ago)
Physical
Mounting Type Surface Mount
Package / Case 64-UFBGA, WLCSP
Surface Mount YES
Number of Pins 64
Technical
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series STM32L1
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 64
Terminal Finish Tin (Sn)
Subcategory Microcontrollers
Max Power Dissipation 290mW
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.4mm
Frequency 32MHz
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number STM32L151
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 2/3.3V
Supply Voltage-Min (Vsup) 1.8V
Interface I2C, I2S, IrDA, LIN, SPI, UART, USART, USB
Memory Size 384kB
Oscillator Type Internal
Number of I/O 51
RAM Size 48K x 8
Voltage - Supply (Vcc/Vdd) 1.8V~3.6V
uPs/uCs/Peripheral ICs Type MICROCONTROLLER, RISC
Core Processor ARM? Cortex?-M3
Peripherals Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
Program Memory Type FLASH
Core Size 32-Bit
Program Memory Size 384KB 384K x 8
Connectivity I2C, IrDA, LINbus, SPI, UART/USART, USB
Supply Current-Max 12.3mA
Bit Size 32
Data Converter A/D 21x12b; D/A 2x12b
Watchdog Timer Yes
Has ADC YES
DMA Channels YES
Data Bus Width 32b
PWM Channels YES
DAC Channels YES
Number of Timers/Counters 9
Core Architecture ARM
EEPROM Size 12K x 8
CPU Family CORTEX-M3
Dimensions
Height Seated (Max) 0.6mm
Compliance
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Alternative Model
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