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XCV812E-8BG560C

Xilinx Inc.
RoHS
/
Package 560-LBGA Exposed Pad, Metal
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description Virtex?-E EM XCV812E 560-LBGA Exposed Pad Metal Tin/Lead (Sn63Pb37) field programmable gate array 1.7mm 1.8V 416MHz 0.4ns
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Technical Details

Compliance

Lead Free Contains Lead
RoHS Status Non-RoHS Compliant
Radiation Hardening No

Dimensions

Width 42.5mm
Length 42.5mm
Height Seated (Max) 1.7mm

Technical

Combinatorial Delay of a CLB-Max 0.4 ns
Speed Grade 8
Number of LABs/CLBs 4704
Number of Gates 254016
Total RAM Bits 1146880
Number of Logic Elements/Cells 21168
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Inputs 404
Clock Frequency 416MHz
RAM Size 140kB
Number of I/O 404
Operating Supply Voltage 1.8V
Number of Outputs 404
JESD-30 Code S-PBGA-B560
Pin Count 560
Base Part Number XCV812E
Time@Peak Reflow Temperature-Max (s) 30
Terminal Pitch 1.27mm
Supply Voltage 1.8V
Peak Reflow Temperature (Cel) 225
Terminal Form BALL
Terminal Position BOTTOM
Voltage - Supply 1.71V~1.89V
Technology CMOS
Subcategory Field Programmable Gate Arrays
Terminal Finish Tin/Lead (Sn63Pb37)
ECCN Code 3A991.D
Number of Terminations 560
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Part Status Obsolete
Pbfree Code no
JESD-609 Code e0
Series Virtex?-E EM
Published 2002
Packaging Tray
Operating Temperature 0°C~85°C TJ

Physical

Package / Case 560-LBGA Exposed Pad, Metal
Mounting Type Surface Mount
Mount Surface Mount

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