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Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description CMOS MILITARY Non-RoHS Compliant FLAT FPGA 125C 1.4ns 217MHz 2.25V
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Technical Details

Physical

Surface Mount YES
Number of Terminals 256

Technical

JESD-609 Code e0
Pbfree Code no
Terminal Finish TIN LEAD
Additional Feature IT CAN ALSO OPERATE WITH 3.3V AND 5V
Technology CMOS
Terminal Position QUAD
Terminal Form FLAT
Peak Reflow Temperature (Cel) 225
Supply Voltage 2.5V
Terminal Pitch 0.5mm
Reach Compliance Code compliant
Time@Peak Reflow Temperature-Max (s) 20
Pin Count 256
JESD-30 Code S-CQFP-F256
Qualification Status Not Qualified
Operating Temperature (Max) 125°C
Operating Temperature (Min) -55°C
Supply Voltage-Max (Vsup) 2.75V
Temperature Grade MILITARY
Supply Voltage-Min (Vsup) 2.25V
Clock Frequency 217MHz
Organization 1800 CLBS, 48000 GATES
Seated Height-Max 3.3mm
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Combinatorial Delay of a CLB-Max 1.4 ns
Number of CLBs 1800
Number of Equivalent Gates 48000

Dimensions

Length 36mm
Width 36mm

Compliance

RoHS Status Non-RoHS Compliant

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