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Package PDIP
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description MACROCELL CMOS COMMERCIAL Non-RoHS Compliant field programmable gate array 70C 50mA 25ns 38.5MHz
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Technical Details

Compliance

RoHS Status Non-RoHS Compliant

Dimensions

Width 7.62mm
Length 32mm
Height Seated (Max) 5.06mm

Technical

Number of Product Terms 132
Number of Dedicated Inputs 11
Number of Macro Cells 10
Output Function MACROCELL
Programmable Logic Type FLASH PLD
Number of Inputs 22
Architecture PAL-TYPE
Frequency (Max) 38.5MHz
Propagation Delay 25 ns
Nominal Supply Current 50mA
Number of I/O 10
Min Supply Voltage 4.75V
Max Supply Voltage 5.25V
Temperature Grade COMMERCIAL
Power Supplies 5V
Qualification Status Not Qualified
Number of Outputs 10
Pin Count 24
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Terminal Pitch 2.54mm
Supply Voltage 5V
Peak Reflow Temperature (Cel) NOT SPECIFIED
Terminal Form THROUGH-HOLE
Terminal Position DUAL
Technology CMOS
Subcategory Programmable Logic Devices
HTS Code 8542.39.00.01
Min Operating Temperature 0°C
Max Operating Temperature 70°C
Terminal Finish Tin/Lead (Sn/Pb)
Number of Terminations 24
JESD-609 Code e0

Physical

Surface Mount NO
Package / Case PDIP

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