EPF8452ALC84-2
RoHS
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Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description
REGISTERED CMOS COMMERCIAL Non-RoHS Compliant FPGA 70C 417MHz 4.75V 5.08mm
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Technical Details
Physical
Surface Mount YES
Technical
JESD-609 Code e0
Number of Terminations 84
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature 336 LOGIC ELEMENTS
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 84
JESD-30 Code S-PQCC-J84
Number of Outputs 64
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 3.3/55V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Number of I/O 68
Clock Frequency 417MHz
Number of Inputs 68
Organization 4 DEDICATED INPUTS, 68 I/O
Programmable Logic Type LOADABLE PLD
Output Function REGISTERED
Number of Logic Cells 336
Number of Dedicated Inputs 4
Dimensions
Height Seated (Max) 5.08mm
Length 29.3116mm
Width 29.3116mm
Compliance
RoHS Status Non-RoHS Compliant
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