EP20K600EFC672-1N
RoHS
/
Package FBGA
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description
MACROCELL CMOS OTHER 2001 FPGA 85C 38kB 1.57ns 180MHz
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Technical Details
Physical
Mount Surface Mount
Package / Case FBGA
Technical
Published 2001
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 4
Number of Terminations 672
ECCN Code 3A001.A.7.A
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
Max Operating Temperature 85°C
Min Operating Temperature 0°C
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 245
Supply Voltage 1.8V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 672
JESD-30 Code S-PBGA-B672
Number of Outputs 500
Qualification Status Not Qualified
Operating Supply Voltage 1.8V
Supply Voltage-Max (Vsup) 1.89V
Power Supplies 1.81.8/3.3V
Temperature Grade OTHER
Memory Size 38kB
Number of I/O 508
RAM Size 38kB
Propagation Delay 1.57 ns
Frequency (Max) 180MHz
Number of Inputs 500
Programmable Logic Type LOADABLE PLD
Number of Logic Elements/Cells 24320
Number of Gates 1.537e+06
Number of Logic Blocks (LABs) 2432
Output Function MACROCELL
Number of Dedicated Inputs 4
Dimensions
Height Seated (Max) 3.5mm
Length 27mm
Width 27mm
Compliance
RoHS Status RoHS Compliant
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