EP20K600EFC1020-2X
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description
MACROCELL CMOS OTHER Non-RoHS Compliant FPGA 85C 0.4ns 160MHz 2.375V
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Technical Details
Physical
Surface Mount YES
Technical
JESD-609 Code e0
Moisture Sensitivity Level (MSL) 3
Number of Terminations 1020
Terminal Finish Tin/Lead (Sn/Pb)
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 220
Supply Voltage 2.5V
Terminal Pitch 1mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 1020
JESD-30 Code S-PBGA-B1020
Number of Outputs 588
Qualification Status Not Qualified
Operating Temperature (Max) 85°C
Supply Voltage-Max (Vsup) 2.625V
Power Supplies 1.82.53.3V
Temperature Grade OTHER
Supply Voltage-Min (Vsup) 2.375V
Number of I/O 588
Clock Frequency 160MHz
Propagation Delay 0.4 ns
Number of Inputs 588
Organization 4 DEDICATED INPUTS, 588 I/O
Programmable Logic Type LOADABLE PLD
Output Function MACROCELL
Number of Logic Cells 24320
Number of Dedicated Inputs 4
Dimensions
Height Seated (Max) 3.5mm
Length 33mm
Width 33mm
Compliance
RoHS Status Non-RoHS Compliant
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