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EP20K200CQ240C9

Altera
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description MACROCELL CMOS OTHER 2001 FPGA 85C 13kB 2ns 1.71V
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Technical Details

Physical

Mount Surface Mount
Number of Pins 240

Technical

Published 2001
JESD-609 Code e0
Part Status Discontinued
Moisture Sensitivity Level (MSL) 3
Number of Terminations 240
ECCN Code 3A991
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 85°C
Min Operating Temperature 0°C
HTS Code 8542.39.00.01
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 245
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Pin Count 240
Number of Outputs 160
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 1.89V
Power Supplies 1.81.8/3.3V
Temperature Grade OTHER
Supply Voltage-Min (Vsup) 1.71V
Number of I/O 168
RAM Size 13kB
Propagation Delay 2 ns
Programmable Logic Type LOADABLE PLD
Number of Logic Elements/Cells 8320
Number of Gates 526000
Number of Logic Blocks (LABs) 832
Output Function MACROCELL
Number of Dedicated Inputs 4

Dimensions

Height Seated (Max) 4.1mm
Length 32mm
Width 32mm

Compliance

RoHS Status RoHS Compliant

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