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A1280A-2PL84C

Actel
RoHS
/
Package /
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description CMOS COMMERCIAL Non-RoHS Compliant J BEND field programmable gate array 70C 3.8ns 85MHz 4.75V
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Technical Details

Physical

Surface Mount YES

Technical

JESD-609 Code e0
Moisture Sensitivity Level (MSL) 3
Number of Terminations 84
Terminal Finish Tin/Lead (Sn/Pb)
Additional Feature MAX 72 I/OS
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 225
Supply Voltage 5V
Terminal Pitch 1.27mm
Time@Peak Reflow Temperature-Max (s) 30
JESD-30 Code S-PQCC-J84
Number of Outputs 140
Qualification Status Not Qualified
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Power Supplies 5V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Clock Frequency 85MHz
Number of Inputs 140
Organization 1232 CLBS, 8000 GATES
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Combinatorial Delay of a CLB-Max 3.8 ns
Number of CLBs 1232
Number of Logic Cells 1232
Number of Equivalent Gates 8000

Dimensions

Height Seated (Max) 4.45mm
Length 29.21mm
Width 29.21mm

Compliance

RoHS Status Non-RoHS Compliant

Alternative Model

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