A1010B-2PL68C
RoHS
/
Package PLCC
Category Integrated Circuits (ICs) / Embedded - FPGAs (Field Programmable Gate Array)
Description
CMOS COMMERCIAL 1997 RoHS Compliant FPGA 70C 3.4ns 65MHz 5.25V
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Technical Details
Supply Chain
Factory Lead Time 14 Weeks
Physical
Mount Surface Mount
Package / Case PLCC
Number of Pins 68
Technical
Published 1997
JESD-609 Code e0
Moisture Sensitivity Level (MSL) 3
Number of Terminations 68
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Subcategory Field Programmable Gate Arrays
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 225
Supply Voltage 5V
Frequency 65MHz
Time@Peak Reflow Temperature-Max (s) 30
Number of Outputs 57
Operating Supply Voltage 5V
Power Supplies 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 57
Propagation Delay 3.4 ns
Turn On Delay Time 3.4 ns
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Number of Gates 1200
Number of Logic Blocks (LABs) 295
Speed Grade 2
Number of Registers 147
Number of CLBs 295
Number of Logic Cells 295
Dimensions
Height Seated (Max) 4.445mm
Compliance
Radiation Hardening No
RoHS Status RoHS Compliant
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