DS1013-75
RoHS
/
Package 14-DIP (0.300, 7.62mm)
Category Integrated Circuits (ICs) / Clock/Timing - Delay Lines
Description
SILICON DELAY LINE Multiple NonProgrammable TIN LEAD CMOS delay line IC 0C~70C 4.75V 75ns 19.05mm
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Technical Details
Compliance
RoHS Status Non-RoHS Compliant
Dimensions
Width 7.62mm
Length 19.05mm
Height Seated (Max) 4.572mm
Technical
Total Delay-Nom (td) 75 ns
Programmable Delay Line NO
Delay to 1st Tap 75ns
Number of Independent Delays 3
Number of Taps/Steps 1
Logic IC Type SILICON DELAY LINE
Output Polarity TRUE
Family CMOS
Supply Voltage-Min (Vsup) 4.75V
Supply Voltage-Max (Vsup) 5.25V
Qualification Status COMMERCIAL
Function Multiple, NonProgrammable
JESD-30 Code R-PDIP-T14
Time@Peak Reflow Temperature-Max (s) 20
Terminal Pitch 2.54mm
Supply Voltage 5V
Peak Reflow Temperature (Cel) 240
Terminal Position DUAL
Voltage - Supply 4.75V~5.25V
Technology CMOS
Terminal Finish TIN LEAD
Number of Terminations 14
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Part Status Obsolete
Pbfree Code no
JESD-609 Code e0
Packaging Tube
Operating Temperature 0°C~70°C
Physical
Surface Mount NO
Package / Case 14-DIP (0.300, 7.62mm)
Mounting Type Through Hole
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