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Package 14-DIP (0.300, 7.62mm)
Category Integrated Circuits (ICs) / Clock/Timing - Delay Lines
Description 14-DIP (0.300 7.62mm) e0 Obsolete CMOS delay line IC 19.05mm 70ns 4.75V
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Buying Options
Total Price: USD $3.05
Unit Price: USD $3.0536
≥1 USD $3.0536
Inventory: 726
Minimum: 1
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Technical Details

Physical

Mounting Type Through Hole
Package / Case 14-DIP (0.300, 7.62mm)
Surface Mount NO

Technical

Packaging Tube
JESD-609 Code e0
Pbfree Code no
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Terminal Finish TIN LEAD
Technology CMOS
Voltage - Supply 5V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 240
Supply Voltage 5V
Terminal Pitch 2.54mm
Time@Peak Reflow Temperature-Max (s) 20
JESD-30 Code R-PDIP-T14
Function Multiple
Qualification Status COMMERCIAL
Operating Temperature (Max) 70°C
Supply Voltage-Max (Vsup) 5.25V
Temperature Grade COMMERCIAL
Supply Voltage-Min (Vsup) 4.75V
Family CMOS
Output Polarity TRUE
Logic IC Type SILICON DELAY LINE
Number of Taps/Steps 1
Number of Independent Delays 3
Delay to 1st Tap 70ns
Programmable Delay Line NO
Available Total Delays 70, 70, 70ns
Total Delay-Nom (td) 70 ns

Dimensions

Height Seated (Max) 4.572mm
Length 19.05mm
Width 7.62mm

Compliance

RoHS Status Non-RoHS Compliant

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