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DS1100M-45

Maxim Integrated
RoHS
/
Package 8-DIP (0.300, 7.62mm)
Category Integrated Circuits (ICs) / Clock/Timing - Delay Lines
Description 8-DIP (0.300 7.62mm) e3 DS1100 Obsolete delay line circuit 7.62mm 9ns 5V 2002
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Technical Details

Physical

Mount Through Hole
Mounting Type Through Hole
Package / Case 8-DIP (0.300, 7.62mm)

Technical

Operating Temperature -40°C~85°C
Packaging Tube
Published 2002
JESD-609 Code e3
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Terminal Finish Matte Tin (Sn)
Subcategory Delay Lines
Technology CMOS
Voltage - Supply 4.75V~5.25V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number DS1100
JESD-30 Code R-PDIP-T8
Function Nonprogrammable
Qualification Status Not Qualified
Power Supplies 5V
Output Polarity TRUE
Logic IC Type SILICON DELAY LINE
Output Impedance 50Ohm
Number of Taps/Steps 5
Number of Independent Delays 1
Delay to 1st Tap 9ns
Programmable Delay Line NO
Available Total Delays 45ns
Total Delay-Nom (td) 45 ns

Dimensions

Width 7.62mm

Compliance

RoHS Status Non-RoHS Compliant
Lead Free Contains Lead

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