DS1100M-200
RoHS
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Package 8-DIP (0.300, 7.62mm)
Category Integrated Circuits (ICs) / Clock/Timing - Delay Lines
Description
8-DIP (0.300 7.62mm) e0 DS1100 Obsolete delay line circuit 7.62mm 40ns 5V 2002
PDF
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Buying Options
Total Price: USD $4.3
Unit Price: USD $4.298061
≥1 USD $4.298061
≥10 USD $4.054775
≥100 USD $3.825258
≥500 USD $3.608733
≥1000 USD $3.404469
Inventory: 1247
Minimum: 1
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Technical Details
Physical
Mount Through Hole
Mounting Type Through Hole
Package / Case 8-DIP (0.300, 7.62mm)
Technical
Operating Temperature -40°C~85°C
Packaging Tube
Published 2002
JESD-609 Code e0
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Terminal Finish Tin/Lead (Sn/Pb)
Subcategory Delay Lines
Technology CMOS
Voltage - Supply 4.75V~5.25V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 240
Supply Voltage 5V
Reach Compliance Code not_compliant
Time@Peak Reflow Temperature-Max (s) 20
Base Part Number DS1100
JESD-30 Code R-PDIP-T8
Function Nonprogrammable
Qualification Status Not Qualified
Power Supplies 5V
Output Polarity TRUE
Logic IC Type SILICON DELAY LINE
Prop. Delay@Nom-Sup 200 ns
Output Impedance 50Ohm
Number of Taps/Steps 5
Number of Independent Delays 1
Delay to 1st Tap 40ns
Programmable Delay Line NO
Available Total Delays 200ns
Total Delay-Nom (td) 200 ns
Dimensions
Width 7.62mm
Compliance
RoHS Status Non-RoHS Compliant
Lead Free Contains Lead
Alternative Model
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