DS1013-75+
RoHS 
RoHS compliant
RoHS compliantPackage 14-DIP (0.300, 7.62mm)
Category Integrated Circuits (ICs) / Clock/Timing - Delay Lines
Description
SILICON DELAY LINE Multiple NonProgrammable MATTE TIN CMOS delay line IC 0C~70C 1999 4.75V 75ns
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Technical Details
Physical
Mounting Type Through Hole
Package / Case 14-DIP (0.300, 7.62mm)
Surface Mount NO
Technical
Operating Temperature 0°C~70°C
Packaging Tube
Published 1999
JESD-609 Code e3
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Terminal Finish MATTE TIN
Technology CMOS
Voltage - Supply 4.75V~5.25V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Terminal Pitch 2.54mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number DS1013
JESD-30 Code R-PDIP-T14
Function Multiple, NonProgrammable
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 5.25V
Supply Voltage-Min (Vsup) 4.75V
Family CMOS
Output Polarity TRUE
Logic IC Type SILICON DELAY LINE
Number of Taps/Steps 1
Number of Independent Delays 3
Delay to 1st Tap 75ns
Programmable Delay Line NO
Total Delay-Nom (td) 75 ns
Dimensions
Height Seated (Max) 4.572mm
Length 19.05mm
Width 7.62mm
Compliance
RoHS Status ROHS3 Compliant
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