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Category Integrated Circuits (ICs) / Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers
Description QUAD NO LEAD COMMERCIAL Matte Tin (Sn) - annealed clock generator circuit 2004 0C 0.04ns 6mm
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Technical Details

Compliance

RoHS Status RoHS Compliant

Dimensions

Width 6mm
Length 6mm
Height Seated (Max) 0.9mm

Technical

Number of True Outputs 10
Same Edge Skew-Max (tskwd) 0.04 ns
fmax-Min 350 MHz
Max I(ol) 0.009 A
Input Clock
Output Characteristics 3-STATE
Family 97U
Frequency (Max) 370MHz
Number of Circuits 1
Temperature Grade COMMERCIAL
Qualification Status Not Qualified
JESD-30 Code S-XQCC-N40
Pin Count 40
Time@Peak Reflow Temperature-Max (s) 30
Terminal Pitch 0.5mm
Supply Voltage 1.8V
Number of Functions 1
Peak Reflow Temperature (Cel) 260
Terminal Form NO LEAD
Terminal Position QUAD
Min Operating Temperature 0°C
Max Operating Temperature 70°C
Terminal Finish Matte Tin (Sn) - annealed
ECCN Code EAR99
Number of Terminations 40
Moisture Sensitivity Level (MSL) 3
Pbfree Code yes
JESD-609 Code e3
Published 2004
Packaging Tape & Reel (TR)

Physical

Mount Surface Mount

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