IDT74FCT3807QG8
RoHS
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Package SSOP
Category Integrated Circuits (ICs) / Clock/Timing - Clock Buffers, Drivers
Description
LVTTL SSOP R-PDSO-G20 Matte Tin (Sn) - annealed clock buffer 8.65mm 0.024A 0.5ns 100MHz
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Technical Details
Compliance
RoHS Status RoHS Compliant
Dimensions
Length 8.65mm
Technical
Number of True Outputs 10
Same Edge Skew-Max (tskwd) 0.5 ns
Propagation Delay (tpd) 4.8 ns
Prop. Delay@Nom-Sup 4.8 ns
Max I(ol) 0.024 A
Logic IC Type LOW SKEW CLOCK DRIVER
Input LVTTL
Family FCT
Frequency (Max) 100MHz
Load Capacitance 50pF
Number of Circuits 1
Supply Voltage-Min (Vsup) 3V
Temperature Grade COMMERCIAL
Power Supplies 3.3V
Supply Voltage-Max (Vsup) 3.6V
Qualification Status Not Qualified
JESD-30 Code R-PDSO-G20
Pin Count 20
Time@Peak Reflow Temperature-Max (s) 30
Terminal Pitch 0.635mm
Supply Voltage 3.3V
Number of Functions 1
Peak Reflow Temperature (Cel) 260
Terminal Form GULL WING
Terminal Position DUAL
Technology CMOS
Subcategory Clock Drivers
Min Operating Temperature 0°C
Max Operating Temperature 70°C
Terminal Finish Matte Tin (Sn) - annealed
ECCN Code EAR99
Number of Terminations 20
Moisture Sensitivity Level (MSL) 1
Pbfree Code yes
JESD-609 Code e3
Published 2009
Packaging Tape & Reel (TR)
Physical
Package / Case SSOP
Mount Surface Mount
Alternative Model
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