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Package TSSOP
Category Integrated Circuits (ICs) / Clock/Timing - Clock Buffers, Drivers
Description LVTTL TSSOP R-PDSO-G28 Matte Tin (Sn) - annealed clock buffer 4.4mm 2.5V 0.025ns 200MHz
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Technical Details

Physical

Mount Surface Mount
Package / Case TSSOP

Technical

Packaging Tape & Reel (TR)
Published 2012
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 1
Number of Terminations 28
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Clock Drivers
Technology CMOS
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 2.5V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 28
JESD-30 Code R-PDSO-G28
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 2.7V
Power Supplies 2.5V
Temperature Grade INDUSTRIAL
Supply Voltage-Min (Vsup) 2.3V
Number of Circuits 1
Frequency (Max) 200MHz
Input LVTTL
Logic IC Type LOW SKEW CLOCK DRIVER
Same Edge Skew-Max (tskwd) 0.025 ns
Number of True Outputs 5

Dimensions

Length 9.7mm
Width 4.4mm

Compliance

RoHS Status RoHS Compliant

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