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Package TSSOP
Category Integrated Circuits (ICs) / Clock/Timing - Clock Buffers, Drivers
Description LVTTL TSSOP R-PDSO-G8 Matte Tin (Sn) - annealed clock driver 3mm 0.024A 3.8ns 140MHz
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Technical Details

Physical

Mount Surface Mount
Package / Case TSSOP

Technical

Packaging Tape & Reel (TR)
Published 1999
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 1
Number of Terminations 8
ECCN Code EAR99
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 85°C
Min Operating Temperature -40°C
Subcategory Clock Drivers
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 1
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 8
JESD-30 Code R-PDSO-G8
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Temperature Grade INDUSTRIAL
Supply Voltage-Min (Vsup) 3V
Number of Circuits 1
Frequency (Max) 140MHz
Family 2304
Output Characteristics 3-STATE
Input LVTTL
Logic IC Type LOW SKEW CLOCK DRIVER
Max I(ol) 0.024 A
Prop. Delay@Nom-Sup 3.8 ns
Propagation Delay (tpd) 3.8 ns
Number of True Outputs 4

Dimensions

Length 4.4mm
Width 3mm

Compliance

RoHS Status RoHS Compliant

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