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74LVC00AT14-13
RoHS 
RoHS compliant
RoHS compliantPackage 14-TSSOP (0.173, 4.40mm Width)
Category Logic - Gates and Inverters / Logic - Gates and Inverters
Description
NAND e3 74LVC Cut Tape (CT) logic gate circuit 4.1ns @ 3.3V 50pF 1.05mm 24mA 24mA 5.5V
PDF
Buying Options
Total Price: USD $0.69
Unit Price: USD $0.1387
≥5 USD $0.1387
≥50 USD $0.114
≥150 USD $0.1102
Inventory: 25
Minimum: 5
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Technical Details
Physical
Contact Plating Tin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 14-TSSOP (0.173, 4.40mm Width)
Number of Pins 14
Dimensions
Height 1.05mm
Length 5.1mm
Width 4.5mm
Compliance
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Technical
Operating Temperature -40°C~125°C
Packaging Cut Tape (CT)
Published 2012
Series 74LVC
JESD-609 Code e3
Pbfree Code yes
Part Status Discontinued
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Subcategory Gates
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Number of Functions 4
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 14
Number of Outputs 1
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Number of Circuits 4
Load Capacitance 50pF
Propagation Delay 4.1 ns
Quiescent Current 40μA
Turn On Delay Time 6.5 ns
Family LVC/LCX/Z
Logic Function NAND
Number of Inputs 2
Current - Output High, Low 24mA 24mA
Logic Type NAND Gate
Max Propagation Delay @ V, Max CL 4.1ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5.5 ns
Logic Level - Low 0.7V ~ 0.8V
Logic Level - High 1.7V ~ 2V
Current - Quiescent (Max) 10μA
Schmitt Trigger Input No
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