{"id":8316,"date":"2026-04-08T18:18:52","date_gmt":"2026-04-08T10:18:52","guid":{"rendered":"https:\/\/www.flywing-tech.com\/blog\/?p=8316"},"modified":"2026-04-08T18:18:59","modified_gmt":"2026-04-08T10:18:59","slug":"epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications","status":"publish","type":"post","link":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/","title":{"rendered":"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0"},"content":{"rendered":"<div class=\"fsc_text\">\n<p>The EPC23101 is a 100 V monolithic GaN IC from Efficient Power Conversion (EPC) that integrates a high-side eGaN FET (3.3 m\u03a9 RDS(on) max \/ 2.6 m\u03a9 typical), a half-bridge gate driver, input logic interface, level shifting, and synchronous bootstrap charging \u2014 all in a single thermally enhanced QFN. Paired with the EPC2302 external low-side FET (1.4\u20131.8 m\u03a9), it forms a 65 A ePower Chipset capable of over 1 MHz switching and up to 97% efficiency in a 48 V-to-12 V buck converter within a combined 7 \u00d7 5 mm footprint. <\/p>\n\n\n\n<p><strong>Important: <\/strong>the official errata limits safe operating VIN to 60 V maximum, not 100 V.<br><br><\/p>\n\n\n\n<div class=\"epc23101-specs-wrapper\" style=\"max-width: 600px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #10B981\">\n\n  <table class=\"epc23101-specs-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111827;min-width: 300px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #065f46, #10b981);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #065f46\">\n      EPC23101 Key Performance Parameters\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #10b981, #6ee7b7);color: white\">\n        <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #34d399;width: 50%\">Parameter<\/th>\n        <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #34d399;width: 50%\">Value<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n      <!-- Row 1 -->\n      <tr style=\"background: #f0fdf4\">\n        <td style=\"padding: 12px 14px;border-bottom: 1px solid #d1fae5\">HS FET RDS(on) max<\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #d1fae5\">\n          <span style=\"background: #bbf7d0;color: #065f46;font-weight: 700;padding: 4px 12px;border-radius: 20px\">3.3 m\u03a9<\/span>\n        <\/td>\n      <\/tr>\n\n      <!-- Row 2 -->\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 14px;border-bottom: 1px solid #d1fae5\">Peak efficiency @ 500 kHz<\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #d1fae5\">\n          <span style=\"background: #d1fae5;color: #065f46;font-weight: 700;padding: 4px 12px;border-radius: 20px\">97%<\/span>\n        <\/td>\n      <\/tr>\n\n      <!-- Row 3 -->\n      <tr style=\"background: #f0fdf4\">\n        <td style=\"padding: 12px 14px;border-bottom: 1px solid #d1fae5\">Max output current<\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #d1fae5\">\n          <span style=\"background: #fef9c3;color: #78350f;font-weight: 700;padding: 4px 12px;border-radius: 20px\">65 A<\/span>\n        <\/td>\n      <\/tr>\n\n      <!-- Row 4 -->\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 14px;border-bottom: 1px solid #d1fae5\">Max switching frequency<\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #d1fae5\">\n          <span style=\"background: #ede9fe;color: #5b21b6;font-weight: 700;padding: 4px 12px;border-radius: 20px\">&gt; 1 MHz<\/span>\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding: 12px 20px;background: #f0fdf4;border-top: 1px solid #d1fae5;font-size: 0.84rem;color: #065f46;line-height: 1.6;font-family: 'Segoe UI', system-ui, sans-serif\">\n    <strong>\u26a0 Note:<\/strong> These parameters are typical values at room temperature. Actual performance may vary depending on VIN, load, and PCB layout.\n  <\/div>\n\n<\/div>\n\n\n\n<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_76 counter-hierarchy ez-toc-counter ez-toc-custom ez-toc-container-direction\">\r\n<div class=\"ez-toc-title-container\">\r\n<h2 class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/h2>\r\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #023a85;color:#023a85\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #023a85;color:#023a85\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\r\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#what_is_the_epc23101\" >What Is the EPC23101?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#epc23101_pinout_diagram_pin_descriptions\" >EPC23101 Pinout Diagram &amp; Pin Descriptions<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#functional_architecture_internal_block_diagram\" >Functional Architecture &amp; Internal Block Diagram<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#electrical_characteristics_key_specifications\" >Electrical Characteristics &amp; Key Specifications<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#epc23101_epc2302_%e2%80%94_epower_chipset_configuration\" >EPC23101 + EPC2302 \u2014 ePower Chipset Configuration<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#epc23101_vs_epc2152_%e2%80%94_architecture_selection_guide\" >EPC23101 vs. EPC2152 \u2014 Architecture Selection Guide<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#application_circuits_reference_designs\" >Application Circuits &amp; Reference Designs<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#pcb_layout_guidelines\" >PCB Layout Guidelines<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#errata_known_limitations\" >Errata &amp; Known Limitations<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#frequently_asked_questions_about_the_epc23101_gan_fet\" >Frequently Asked Questions About the EPC23101 GaN FET<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-11\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#pre-layout_design_checklist\" >Pre-Layout Design Checklist<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-12\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#conclusion\" >Conclusion<\/a><\/li><\/ul><\/nav><\/div>\r\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"what_is_the_epc23101\"><\/span>What Is the EPC23101?<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\">EPC23101<\/a> is a 100 V-rated monolithic gallium nitride (GaN) IC introduced by Efficient Power Conversion (EPC) in December 2021. It is part of EPC&#8217;s ePower\u2122 Stage IC family\u2013 a lineup designed to simplify power converter design by integrating the most parasitic-sensitive components into a single chip, including the high-side FET and its associated gate driver circuitry.<\/p>\n\n\n\n<p>The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\">EPC23101<\/a> differs from earlier EPC high frequency devices, such as<a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc2152engrt-6f151669\"> EPC2152 <\/a>(which is a fully integrated dual-FET half-bridge with both transistor drivers and sharing the same die. In contrast, the EPC23101integrates only the high-side FET on chip and provides a gate driver output (LGOUT) to drive an external low-side FET. This approach gives designers greater flexibility, as they can independently select and size each FET based on current requirements, asymmetrical duty cycle loss distributions and thermal management considerations _something that is not possible with fully symmetric monolithic designs.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Technology Platform \u2014 GaN-on-Silicon<\/h3>\n\n\n\n<p>The EPC23101 is manufactured using EPC&#8217;s exclusive GaN on Silicon (GaN on Si) process utilizing Enhancement Mode GaN (e-mode) transistors. As with many of today&#8217;s conventional MOSFET transistors, e-mode GaN transistors are normally off until a sufficiently high positive voltage is applied to the gate, allowing them to turn on; thus eliminating the need for a negative gate supply and greatly simplifying the design of the gate drive circuit.<\/p>\n\n\n\n<p>Compared to silicon, GaN has a distinct material advantage as it possesses no reverse recovery charge (Qrr = 0). In other words, silicon MOSFETs retain some minority carrier charge in the body diode while turned-on and the reverse recovery charge must be cleared out during turn-off, resulting in a current spike, energy lost during switching, and placing a hard cap on the maximum allowed frequency of switching. In the case of GaN, there is no body diode to negate reverse current conduction; rather, GaN devices are based on drain-source conduction when the gate-source voltage is 0, thus not generating any recovery charge. This key specification provides GaN converters with the ability to switch at MHz frequencies and operate at overall efficiencies that are not possible with silicon devices.<\/p>\n\n\n\n<p>The lateral architecture of GaN-on-Si enables EPC\u2019s process engineers to integrate multiple logic- level devices on the same die as the power transistor, including an input buffer, level shifter, bootstrap charge switch, and under-voltage lockout comparator. The co-integration forms the physical foundation of the monolithic architecture used in the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\">EPC23101<\/a>.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\">Product Summary<\/h3>\n\n\n\n<div class=\"epc23101-pinout-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #a78bfa\">\n\n  <table class=\"epc23101-pinout-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111828;min-width: 750px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #c084fc, #ec4899);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #c084fc\">\n      EPC23101 Device Parameters \u2014 Key Specs Overview\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #8b5cf6, #ec4899);color: white\">\n        <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #d8b4fe;width: 30%\">Parameter<\/th>\n        <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #d8b4fe\">Value \/ Description<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n      <!-- Manufacturer -->\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e9d5ff;border-left: 3px solid #a78bfa\">\n          <span style=\"background: #ede9fe;color: #5b21b6;border: 1px solid #c4b5fd;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">Manufacturer<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e9d5ff;font-size: 0.88rem;color: #6b21a8;line-height: 1.7\">\n          Efficient Power Conversion (EPC)\n        <\/td>\n      <\/tr>\n\n      <!-- Device Type -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e9d5ff;border-left: 3px solid #a78bfa\">\n          <span style=\"background: #ede9fe;color: #5b21b6;border: 1px solid #c4b5fd;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">Device Type<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e9d5ff;font-size: 0.88rem;color: #6b21a8;line-height: 1.7\">\n          eGaN IC \u2014 Integrated HS FET + Gate Driver\n        <\/td>\n      <\/tr>\n\n      <!-- Structural VDS -->\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e9d5ff;border-left: 3px solid #a78bfa\">\n          <span style=\"background: #ede9fe;color: #5b21b6;border: 1px solid #c4b5fd;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">Structural VDS<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e9d5ff;font-size: 0.88rem;color: #6b21a8;line-height: 1.7\">\n          100 V\n        <\/td>\n      <\/tr>\n\n      <!-- Max Operating VIN -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e9d5ff;border-left: 3px solid #a78bfa\">\n          <span style=\"background: #ede9fe;color: #5b21b6;border: 1px solid #c4b5fd;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">Max Operating VIN<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e9d5ff;font-size: 0.88rem;color: #6b21a8;line-height: 1.7\">\n          60 V (Errata v1.2)\n        <\/td>\n      <\/tr>\n\n      <!-- RDS(on) Typical -->\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e9d5ff;border-left: 3px solid #a78bfa\">\n          <span style=\"background: #ede9fe;color: #5b21b6;border: 1px solid #c4b5fd;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">RDS(on) Typical<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e9d5ff;font-size: 0.88rem;color: #15803d;font-weight: 700;line-height: 1.7\">\n          2.6 m\u03a9\n        <\/td>\n      <\/tr>\n\n      <!-- Gate Charge Typical -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e9d5ff;border-left: 3px solid #a78bfa\">\n          <span style=\"background: #ede9fe;color: #5b21b6;border: 1px solid #c4b5fd;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">Gate Charge Typical<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e9d5ff;font-size: 0.88rem;color: #6b21a8;line-height: 1.7\">\n          3.5 nC\n        <\/td>\n      <\/tr>\n\n      <!-- Notes \/ Remarks -->\n      <tr style=\"background: #f3e8ff\">\n        <td colspan=\"2\" style=\"padding: 12px 16px;font-size: 0.84rem;color: #6b21a8;line-height: 1.6\">\n          <strong>\u26a0 Note:<\/strong> Values are typical. Max VIN is limited per Errata v1.2. Ensure PCB layout follows EPC recommended guidelines for gate drive and HS FET connections.\n        <\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"epc23101_pinout_diagram_pin_descriptions\"><\/span><strong>EPC23101 Pinout Diagram &amp; Pin Descriptions<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"700\" height=\"420\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/ADS1115-Functional-Block-Diagram-5.png\" alt=\"EPC23101 QFN top-view pinout diagram showing labeled pad numbering, exposed thermal pad, and 0.6 mm separation between high-voltage and low-voltage pads for GaN power design\" class=\"wp-image-8357\" \/><\/figure>\n<\/div>\n\n\n<h3 class=\"wp-block-heading\"><strong>Package Description \u2014 QFN with Exposed Top Pad<\/strong><\/h3>\n\n\n\n<p>The EPC23101 comes in a thermally enhanced QFN package featuring an exposed top thermal pad. Unlike conventional QFN packages that use an exposed bottom pad, this design enables direct attachment of a heat sink or heat spreader to the top surface of the die,&nbsp; where heat is most effectively dissipated. With proper thermal interface material (TIM) selection and forced convection, the junction-to-ambient thermal resistance can be significantly reduced, resulting in improved thermal performance and higher current capability under elevated ambient conditions.<\/p>\n\n\n\n<p>All exposed pads have flanks that allow for wetting confirmation by automated optical inspection (AOI) systems for side inspection of the solder joint quality from the side of the package. This is a production quality-control benefit that is advantageous for high-volume manufacturing. The minimum spacing distance between HV and LV pads is no less than 0.6 mm on the package and complies with IPC creepage and clearance requirements for the device\u2019s voltage class.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"2160\" height=\"270\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101engrt.png\" alt=\"EPC EPC23101ENGRT GaN power stage IC \u2013 100 V half-bridge driver 14-QFN specifications and technical support at Flywing\" class=\"wp-image-8420\" \/><\/a><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Complete Pin Function Reference<\/strong><\/h3>\n\n\n\n<p>The table below provides a complete functional description of every pin. Pin type codes follow EPC\u2019s convention: P = Power, S = Bias Supply, L = Logic Input\/Output, G = Gate Drive Adjust.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\">Power Pins:<\/h4>\n\n\n\n<div class=\"epc23101-pinout-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #FCD34D\"> <table class=\"epc23101-pinout-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111828;min-width: 750px\"> <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #78350f, #92400e);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #78350f\"> EPC23101 Power Pins \u2014 High-Current Paths <\/caption> <thead> <tr style=\"background: linear-gradient(135deg, #92400e, #b45309);color: white\"> <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #d97706;width: 10%\">Pin Name<\/th> <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #d97706;width: 16%\">Type<\/th> <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #d97706\">Function Description<\/th> <\/tr> <\/thead> <tbody> <tr style=\"background: #f9fafb\"> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb;border-left: 3px solid #dc2626\"> <span style=\"background: #fee2e2;color: #b91c1c;border: 1px solid #fecaca;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">VIN<\/span> <\/td> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb\"> <span style=\"background: #1f2937;color: #f9fafb;border: 1px solid #374151;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\u26a1 P \u2014 Power<\/span> <\/td> <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb;font-size: 0.88rem;color: #374151;line-height: 1.7\"> <strong style=\"color: #1f2937\">Power DC input.<\/strong> Connected to the drain terminal of the internal high-side GaN FET. Decouple with power loop capacitors from VIN to PGND placed as close to the device pads as physically possible. <\/td> <\/tr> <tr> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb;border-left: 3px solid #dc2626\"> <span style=\"background: #fee2e2;color: #b91c1c;border: 1px solid #fecaca;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">SW<\/span> <\/td> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb\"> <span style=\"background: #1f2937;color: #f9fafb;border: 1px solid #374151;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\u26a1 P \u2014 Power<\/span> <\/td> <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb;font-size: 0.88rem;color: #374151;line-height: 1.7\"> <strong style=\"color: #1f2937\">Switching node.<\/strong> Source of the internal HS FET and drain of the external LS FET. <span style=\"background: #fee2e2;color: #b91c1c;border: 1px solid #fecaca;font-size: 0.76rem;font-weight: 600;padding: 2px 8px;border-radius: 20px;margin-left: 5px\">\u26a0 Highest dV\/dt node<\/span> <span style=\"margin-top: 5px;color: #6b7280;font-size: 0.84rem\">Keep all sensitive signal traces away from SW copper.<\/span> <\/td> <\/tr> <tr style=\"background: #f9fafb\"> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb;border-left: 3px solid #dc2626\"> <span style=\"background: #fee2e2;color: #b91c1c;border: 1px solid #fecaca;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">PGND<\/span> <\/td> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb\"> <span style=\"background: #1f2937;color: #f9fafb;border: 1px solid #374151;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\u23da P \u2014 Power<\/span> <\/td> <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb;font-size: 0.88rem;color: #374151;line-height: 1.7\"> <strong style=\"color: #1f2937\">Power ground.<\/strong> Connected to the source terminal of the low-side FET. Return point for all high-current switched paths. <\/td> <\/tr> <tr> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb;border-left: 3px solid #dc2626\"> <span style=\"background: #fee2e2;color: #b91c1c;border: 1px solid #fecaca;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">AGND<\/span> <\/td> <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e5e7eb\"> <span style=\"background: #1f2937;color: #f9fafb;border: 1px solid #374151;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\u23da P \u2014 Power<\/span> <\/td> <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb;font-size: 0.88rem;color: #374151;line-height: 1.7\"> <strong style=\"color: #1f2937\">Analog ground.<\/strong> Internally shorted to PGND. Used as the reference for all logic and analog circuits. <span style=\"background: #fef3c7;color: #92400e;border: 1px solid #fde68a;font-size: 0.76rem;font-weight: 600;padding: 2px 8px;border-radius: 20px;margin-left: 5px\">Connect to PGND at single star point<\/span> <\/td> <\/tr> <\/tbody> <\/table> <\/div>\n\n\n\n<h4 class=\"wp-block-heading\">Supply Pins<\/h4>\n\n\n\n<div class=\"epc23101-pinout-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #FCD34D\">\n\n  <table class=\"epc23101-pinout-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111828;min-width: 750px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #1e3a8a, #2563eb);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1e3a8a\">\n      EPC23101 Supply Pins \u2014 Internal IC power rails\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #2563eb, #3b82f6);color: white\">\n        <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa;width: 10%\">Pin Name<\/th>\n        <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa;width: 16%\">Type<\/th>\n        <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa\">Function Description<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <!-- VCC -->\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">VCC<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\u26a1 S \u2014 Supply<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Internal logic supply voltage.<\/strong> Provides power to the internal gate drive and analog circuits. Decouple with 1\u00b5F\u20134.7\u00b5F ceramic capacitor close to the pin.\n        <\/td>\n      <\/tr>\n\n      <!-- VCC_LS -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">VCC_LS<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\u26a1 S \u2014 Supply<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Low-side FET supply.<\/strong> Supplies the gate driver of the internal low-side FET. Typically connected to a bootstrap capacitor between SW and VCC_LS.\n          <span style=\"background: #bfdbfe;color: #1e3a8a;border: 1px solid #93c5fd;font-size: 0.76rem;font-weight: 600;padding: 2px 8px;border-radius: 20px;margin-left: 5px\">Bootstrap required<\/span>\n        <\/td>\n      <\/tr>\n\n      <!-- VCC_HS -->\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">VCC_HS<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\u26a1 S \u2014 Supply<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">High-side FET supply.<\/strong> Supplies the gate driver of the internal high-side FET. Typically powered through a bootstrap network (SW to VCC_HS capacitor) for proper high-side operation.\n        <\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\">Logic Pins:<\/h4>\n\n\n\n<div class=\"epc23101-pinout-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 14px;border: 1px solid #FCD34D\">\n\n  <table class=\"epc23101-pinout-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111828;min-width: 750px\">\n\n    <caption style=\"padding: 18px 20px;background: linear-gradient(135deg, #1e3a8a, #2563eb);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1e3a8a\">\n      EPC23101 Logic Pins \u2014 Control and feedback signals\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #2563eb, #3b82f6);color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa;width: 10%\">Pin Name<\/th>\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa;width: 16%\">Type<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa\">Function Description<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <!-- EN -->\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 14px 16px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">EN<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 I \u2014 Input<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Enable pin.<\/strong> When high, the device is active and switching. When low, the device enters a low-power shutdown mode.\n        <\/td>\n      <\/tr>\n\n      <!-- PWM -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">PWM<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 I \u2014 Input<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">PWM control input.<\/strong> Drives the duty cycle of the internal GaN FETs. Compatible with 3.3V or 5V logic levels.\n        <\/td>\n      <\/tr>\n\n      <!-- FAULT -->\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">FAULT<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 O \u2014 Output<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Fault indicator output.<\/strong> Open-drain output that goes low during overcurrent, overtemperature, or UVLO events. Connect to a pull-up resistor to VCC.\n        <\/td>\n      <\/tr>\n\n      <!-- OTW -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">OTW<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 O \u2014 Output<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Overtemperature warning output.<\/strong> Open-drain signal that goes low when die temperature approaches thermal limit. Use to signal thermal throttling or initiate cooling.\n        <\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\">Gate Drive Pins:<\/h4>\n\n\n\n<div class=\"epc23101-pinout-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #FCD34D\">\n\n  <table class=\"epc23101-pinout-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111828;min-width: 750px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #1e3a8a, #2563eb);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1e3a8a\">\n      EPC23101 Gate Drive Pins \u2014 High-speed GaN FET control\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #2563eb, #3b82f6);color: white\">\n        <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa;width: 10%\">Pin Name<\/th>\n        <th style=\"padding: 12px 14px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa;width: 16%\">Type<\/th>\n        <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #60a5fa\">Function Description<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <!-- GH -->\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">GH<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 O \u2014 Output<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Gate drive output for the high-side GaN FET.<\/strong> Provides fast, high-current switching pulses to the GH pin of the internal FET. Keep traces short and low-inductance.\n        <\/td>\n      <\/tr>\n\n      <!-- GL -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">GL<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 O \u2014 Output<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Gate drive output for the low-side GaN FET.<\/strong> Delivers precise switching pulses with minimal delay and overshoot. Short, low-inductance PCB paths are essential.\n        <\/td>\n      <\/tr>\n\n      <!-- VS -->\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">VS<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 I \u2014 Input<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">High-side FET return node.<\/strong> Connected to the source of the high-side FET. Used as the reference for GH switching and bootstrap operation. Keep connection tight to minimize loop inductance.\n        <\/td>\n      <\/tr>\n\n      <!-- LO -->\n      <tr>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe;border-left: 3px solid #1d4ed8\">\n          <span style=\"background: #dbeafe;color: #1e40af;border: 1px solid #bfdbfe;font-size: 0.88rem;font-weight: 700;padding: 4px 12px;border-radius: 20px;letter-spacing: 0.3px\">LO<\/span>\n        <\/td>\n        <td style=\"padding: 12px 14px;text-align: center;border-bottom: 1px solid #e0f2fe\">\n          <span style=\"background: #1e40af;color: #f9fafb;border: 1px solid #1e3a8a;font-size: 0.78rem;font-weight: 600;padding: 3px 10px;border-radius: 20px\">\ud83d\udd39 O \u2014 Output<\/span>\n        <\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e0f2fe;font-size: 0.88rem;color: #1e293b;line-height: 1.7\">\n          <strong style=\"color: #1e3a8a\">Gate drive output for low-side FET.<\/strong> Directly drives the LO pin of the low-side FET. Must be routed with minimal parasitic inductance to maintain fast switching.\n        <\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"functional_architecture_internal_block_diagram\"><\/span><strong>Functional Architecture &amp; Internal Block Diagram<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>Five functional subsystems (i.e., (1) high-side eGaN power FET, (2) input logic with PWM filtering, (3) high-side\/low-side level shift logic, (4) synchronous bootstrap charging logic, and (5) gate drive buffer circuits for both internal HS FETs and external LS FETs) are integrated in the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\">EPC23101<\/a> Gan FET as an integrated GaN-on-Si die. Understanding how these subsystems interact is essential for achieving a proper design, which includes startup sequencing, dead-time configuration, gate drive tuning, and errata hazard mitigation.<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"700\" height=\"420\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/ADS1115-Functional-Block-Diagram-6.png\" alt=\"Simplified EPC23101 functional block diagram showing half-bridge configuration with external EPC2302 low-side FET, including HSIN and LSIN signal flow through input filter, level shifter, and gate driver buffers to HS and LS FETs\" class=\"wp-image-8358\" \/><\/figure>\n<\/div>\n\n\n<h3 class=\"wp-block-heading\"><strong>Synchronous Bootstrap Charging Circuit<\/strong><\/h3>\n\n\n\n<p>In Conventional gate driver ICs, the floating high-side bootstrap supply is typically charged using a small Schottky diode that forward-biases during low-side conduction intervals. The EPC23101 replaces this diode with a synchronous GaN FET in the bootstrap charging path. The difference is material to both efficiency and design simplicity.<\/p>\n\n\n\n<div style=\"max-width: 1000px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #99f6e4\">\n\n  <!-- Header -->\n  <div style=\"padding: 14px 20px;background: linear-gradient(135deg, #14b8a6, #2dd4bf);color: white;font-family: 'Segoe UI', system-ui;border-bottom: 3px solid #0f766e\">\n    <span style=\"font-size: 0.85rem;font-weight: 700;letter-spacing: 0.6px;text-transform: uppercase\">Key Technical Point<\/span>\n  <\/div>\n\n  <!-- Content -->\n  <div style=\"padding: 18px 22px;font-family: 'Segoe UI', system-ui;color: #134e4a;line-height: 1.7;font-size: 0.95rem;background:#f0fdfa\">\n\n    <p style=\"margin-bottom: 10px\">\n      The <strong>synchronous bootstrap GaN FET<\/strong> produces a dropout voltage of approximately \n      <span style=\"background:#ccfbf1;color:#0f766e;padding:2px 8px;border-radius:12px;font-weight:600\">100 mV<\/span>, \n      compared to approximately \n      <span style=\"background:#fee2e2;color:#b91c1c;padding:2px 8px;border-radius:12px;font-weight:600\">600 mV<\/span> \n      for a conventional Si Schottky bootstrap diode.\n    <\/p>\n\n    <p style=\"margin-bottom: 10px\">\n      Because <strong>VBOOT<\/strong> is maintained closer to <strong>VDD<\/strong>, the high-side gate drive circuit achieves \n      <span style=\"background:#d1fae5;color:#065f46;padding:2px 8px;border-radius:12px;font-weight:600\">consistent gate current<\/span> \n      and \n      <span style=\"background:#d1fae5;color:#065f46;padding:2px 8px;border-radius:12px;font-weight:600\">stable switching delay<\/span> \n      across the full duty-cycle range \u2014 delivering a clear efficiency and timing advantage.\n    <\/p>\n\n    <p>\n      Additionally, the GaN bootstrap FET has \n      <span style=\"background:#bbf7d0;color:#166534;padding:2px 8px;border-radius:12px;font-weight:600\">zero reverse recovery charge<\/span>, \n      eliminating energy loss that occurs in diode-based bootstrap designs during reverse-bias transitions.\n    <\/p>\n\n  <\/div>\n\n  <!-- Footer note -->\n  <div style=\"padding: 12px 20px;background:#ecfeff;border-top:1px solid #99f6e4;font-size:0.82rem;color:#0f766e;font-family:'Segoe UI', system-ui\">\n    \u26a1 <strong>Insight:<\/strong> This improvement directly enhances switching efficiency, reduces losses, and ensures predictable high-frequency performance.\n  <\/div>\n\n<\/div>\n\n\n\n<p>The correct sequencing of the start-up process is critical to the proper function of the IC. At start-up, the bootstrap capacitor CBOOT starts at zero volts. After HSIN and LSIN start switching, the IC includes a nominal six-cycle delay before the high-side gate drive output will closely track your PWM inputs. This allows the bootstrap to build enough charge for reliable turning on of the HS FET, and this is done entirely inside the IC \u2014 no need for external startup sequencing logic.<\/p>\n\n\n\n<p>The bootstrap FET will only be activated after the low-side FET (Q2) has been turned on during the current switching cycle, thus there will be no risk of overcharging CBOOT during a dead-time period. If VDRV is present but VIN is &lt; minimum operating voltage, then the pass transistor from VDRV to VDD is disabled, and all remaining charge on the VDD bypass capacitor will be discharged through the internal circuits of the IC.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Level Shifting and Noise Immunity<\/strong><\/h3>\n\n\n\n<p>The level shifter transfers PWM signals from the low side, referenced to AGND, to the high side, which floats up to VIN (60V operational, according to errata). EPC\u2019s level shifters are designed to remain stable under significant negative transients at the SW node, a common occurrence in hard-switching regulators where the SW rail can ring below ground during the turn-on transitions.&nbsp;<\/p>\n\n\n\n<p>Both HSIN and LSIN are fitted with an input pulse filter, which blocks any pulses shorter than about&nbsp; 15 ns. These onboard filters prevent noise spikes, PWM glitches, and transients from reaching the power MOSFETs&#8217; gates. As noted in Errata point 3, pulses shorter than the minimum pulse width (PW_MIN), which is less than the 15 ns filter, may cause latch-up events. Designers should ensure that the PWM controller\u2019s minimum on- and off-time exceeds PW_MIN in all operating conditions.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Under-Voltage Lockout (UVLO) and Cross-Conduction Prevention<\/strong><\/h3>\n\n\n\n<p>Both high-side and low-side under-voltage lockout (UVLO) circuits monitor the gate drive supply voltage for each FET. If either supply falls below the UVLO threshold, the corresponding FET is immediately turned off. In addition, if both voltages fall below UVLO levels but the input voltage (VIN) is still above 10V, a separate protection circuit activates to prevent any shoot-through during the supply collapse transient. An additional circuit that actively pulls down the gate of each FET is connected to VIN, and it will also prevent the destructive turn-on of FETs due to gate-to-drain leakage current when the FET is in its off-state.&nbsp;<\/p>\n\n\n\n<p>The cross-conduction prevention logic simultaneously monitors&nbsp; HSIN and LSIN. If HSIN and LSIN both assert the high (active) level at the same time, the IC keeps both FETs off until one condition clears and then waits a predetermined t_lockout before enabling the appropriate FET. This hardware lockout provides an additional layer of protection but does <strong>not<\/strong> replace the need for correctly programmed dead time in the external PWM controller.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Gate Drive Timing and Tuning<\/strong><\/h3>\n\n\n\n<p>Both the rise and fall times of the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\"><a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\">EPC23101<\/a> Gan FET<\/a> can be adjusted between 1 and 3ns (0 to 48 V swing at maximum load) using\u00a0 external resistor on the RBOOT (for the high-side) and RDRV (for the low-side). Faster switch transitions reduce switching losses, while slower transitions help limit peak time over-voltage at SW node. Since the SW over-voltage spikes can exceed 70 V \u2014 the absolute maximum SW transient rating \u2014 Errata Sheet v1.2 specifies that both resistor values must be at least 3.3\u03a9. Designers who previously used lower resistor values may therefore experience SW over-voltage spikes above 70 V.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"electrical_characteristics_key_specifications\"><\/span><strong>Electrical Characteristics &amp; Key Specifications<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>DC Characteristics \u2014 HS FET and System<\/strong><\/h3>\n\n\n\n<div style=\"max-width: 1100px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #5eead4\">\n\n  <table style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #0f172a;min-width: 700px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #065f46, #047857);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #065f46\">\n      EPC23101 Key Electrical Parameters \u2014 Quick Reference Table\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #047857, #059669);color: white\">\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 30%\">Parameter<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 30%\">Condition<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 13%\">Typical<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 13%\">Max<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 14%\">Unit<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">HS FET RDS(on)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">VGS = 5 V, TJ = 25\u00b0C<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">2.6<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">3.3<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">m\u03a9<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">LS FET RDS(on) (EPC2302)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">VGS = 5 V, TJ = 25\u00b0C<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">1.4<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">1.8<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">m\u03a9<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">VIN Operating Range<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">All conditions<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">48 (nominal)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">60 (Errata)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">V<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">VDRV Supply Range<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">\u2014<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">5.0<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">5.5<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">V<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">HS FET Reverse Conduction Voltage<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">Normal operation<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">2<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">\u2014<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">V<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">HS FET Reverse Conduction (Boost Mode)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">Non-switching, Errata ERR-4<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">&gt;4 (typical)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">\u2014<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">V<\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#ecfdf5;border-top:1px solid #a7f3d0;font-size:0.85rem;color:#065f46;font-family:'Segoe UI', system-ui\">\n    <strong>Note:<\/strong> Values are typical unless otherwise specified. Always verify with latest datasheet and errata for critical designs.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Switching and Logic Characteristics<\/strong><\/h3>\n\n\n\n<div style=\"max-width: 1100px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #5eead4\">\n\n  <table style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #0a4ff5;min-width: 700px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #e8f00e, #e8f00e);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #e6de10\">\n      EPC23101 Performance &amp; Timing Characteristics\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #e8f00e, #e8f00e);color: white\">\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 32%\">Parameter<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 32%\">Condition<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 16%\">Typical<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #10b981;width: 10%\">Unit<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">Max Switching Frequency<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">Full load, VIN = 48 V<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">&gt;1,000<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">kHz<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">Gate Drive Rise \/ Fall Time<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">RBOOT \/ RDRV tuned<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">1 \u2013 3<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">ns<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">Logic Input Threshold (H)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">HSIN, LSIN (3.3 V \/ 5 V CMOS)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">\u2014<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">V<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">Input Pulse Filter Rejection Width<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">Pulses below this value rejected<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">15 (typ)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">ns<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">SW Over-Voltage Limit<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">With RBOOT \/ RDRV \u2265 3.3 \u03a9 (Hard switching)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">\u00b110 (from rail\/GND)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">V<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">SW Node Absolute Max Transient<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">Absolute maximum (Errata)<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">\u2014<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">70 V (MAX)<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">Startup Delay (CBOOT Charge)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">After HSIN \/ LSIN begin switching<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">6 switching cycles<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">\u2014<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1;font-weight:600\">RBOOT, RDRV Minimum Value<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ccfbf1\">Per Errata v1.2<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">3.3 \u03a9 minimum<\/td>\n        <td style=\"padding:12px;text-align:center;border-bottom:1px solid #ccfbf1\">\u03a9<\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#ecfdf5;border-top:1px solid #a7f3d0;font-size:0.85rem;color:#065f46;font-family:'Segoe UI', system-ui\">\n    <strong>Note:<\/strong> Timing and switching characteristics depend heavily on PCB layout, gate loop inductance, and external component selection.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Thermal Characteristics<\/strong><\/h3>\n\n\n\n<p>The exposed top pad is the main thermal path. When attached to a top-side heatsink and receiving 500 LFM of forced airflow, the EPC23101 + EPC2302 chipset will provide 65 A of current in a 48 V-to-12 V buck converter with a temperature rise of less than 50\u00b0C above a 25\u00b0C ambient temperature. All output current and PWM frequency ratings in the <a href=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101_datasheet.pdf\">datasheet<\/a> are specified at TA = 25\u00b0C; however, thermal derating curves should be examined to evaluate the operation of the EPC23101 + EPC2302 chipset at higher ambient temperatures.<\/p>\n\n\n\n<p>The type of thermal interface material used (TIM) has a large impact on junction-to-heatsink thermal resistance. While TIMs with electrical conductivity offer a lower resistance compared to insulating TIMs, they require that the heatsink be isolated if the exposed pad is not grounded. The <a href=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101_datasheet.pdf\">datasheet<\/a> provides both typical parameters for conducting and insulating TIMs in order to assist in thermal budgeting by the designer.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"epc23101_epc2302_%e2%80%94_epower_chipset_configuration\"><\/span><strong>EPC23101 + EPC2302 \u2014 ePower Chipset Configuration<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>EPC developed the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\">EPC23101<\/a> and EPC2302 to work together as part of their ePower Chipset, and they have complementary, optimized pinout layouts. Both chips&#8217; SW pins (the HS FET source) and drain pins (the LS FET drain) are located in the same position on the PCB. This allows for a very tight critical power loop distance between HS source and LS drain connections without requiring any special routing methods. To make it easier for designers to move from traditional discrete MOSFET + Driver solutions to EPC\u2019s ePower chipsets, EPC has created this pin-compatible solution.<\/p>\n\n\n\n<div style=\"max-width: 1100px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #e9d5ff\">\n\n  <table style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #1f2937;min-width: 700px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #6d28d9, #9333ea);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #6d28d9\">\n      EPC23101 vs EPC2302 \u2014 Device Comparison Overview\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #9333ea, #a855f7);color: white\">\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #c084fc;width: 34%\">Parameter<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #c084fc;width: 33%\">EPC23101 (HS IC)<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #c084fc;width: 33%\">EPC2302 (LS FET)<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#faf5ff\">\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">Device Type<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Integrated GaN IC (HS FET + full driver)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Standalone eGaN FET<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">Max Voltage<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">100 V structural<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">100 V structural<\/td>\n      <\/tr>\n\n      <tr style=\"background:#faf5ff\">\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">RDS(on) Typical<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">2.6 m\u03a9<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">1.4 m\u03a9<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">RDS(on) Maximum<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">3.3 m\u03a9<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">1.8 m\u03a9<\/td>\n      <\/tr>\n\n      <tr style=\"background:#faf5ff\">\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">Gate Charge (QG)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Internal \u2014 driven by IC<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Very small \u2014 key switching advantage<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">QGD, QOSS<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Integrated into IC drive design<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Minimised for low switching loss<\/td>\n      <\/tr>\n\n      <tr style=\"background:#faf5ff\">\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">Package<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Thermally enhanced QFN (exposed top)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff\">Thermally enhanced QFN (exposed top)<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">Unit Price (1kU)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">$5.28<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">$4.91<\/td>\n      <\/tr>\n\n      <tr style=\"background:#faf5ff\">\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;font-weight:600\">Combined Footprint<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">7 mm \u00d7 5 mm (both devices)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #f3e8ff;text-align:center\">7 mm \u00d7 5 mm (both devices)<\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#faf5ff;border-top:1px solid #e9d5ff;font-size:0.85rem;color:#5b21b6;font-family:'Segoe UI', system-ui\">\n    <strong>Insight:<\/strong> EPC23101 integrates the high-side driver and FET, simplifying design, while EPC2302 provides ultra-low RDS(on) for high-efficiency low-side switching.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Verified Efficiency Performance<\/strong><\/h3>\n\n\n\n<p>EPC has published measured efficiency data for the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc23101engrt-d3a2b243\">EPC23101<\/a> + EPC2302 chipset operating in a 48 V-to-12 V synchronous buck converter, evaluated on the EPC90142 development board under defined thermal conditions.<\/p>\n\n\n\n<div style=\"max-width: 1100px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #67e8f9\">\n\n  <table style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #0f172a;min-width: 700px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #06b6d4, #0ea5e9);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #0891b2\">\n      Real-World Performance Benchmarks \u2014 GaN Power Stages\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #0ea5e9, #38bdf8);color: white\">\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #7dd3fc;width: 20%\">Switching Frequency<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #7dd3fc;width: 16%\">Peak Efficiency<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #7dd3fc;width: 14%\">Max IOUT<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #7dd3fc;width: 18%\">Temperature Rise<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #7dd3fc;width: 32%\">Reference \/ Application<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#ecfeff\">\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center;font-weight:600\">500 kHz<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">97%<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">65 A<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">&lt;50\u00b0C<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe\">EPC90142, 48 V DC-DC<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center;font-weight:600\">1 MHz<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">96%<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">65 A<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">&lt;50\u00b0C<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe\">EPC90142, high-density<\/td>\n      <\/tr>\n\n      <tr style=\"background:#ecfeff\">\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center;font-weight:600\">500 kHz (bidirectional)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">&gt;96.5%<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">60\u2013110 A<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">\u2014<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe\">EPC9170 (2 kW converter)<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center;font-weight:600\">500 kHz (bidirectional)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">95.8%<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">140 A<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe;text-align:center\">\u2014<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #cffafe\">EPC9170 full load<\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#ecfeff;border-top:1px solid #67e8f9;font-size:0.85rem;color:#0c4a6e;font-family:'Segoe UI', system-ui\">\n    <strong>Insight:<\/strong> GaN-based power stages maintain extremely high efficiency even at MHz switching, enabling compact, high-density designs with reduced thermal stress.\n  <\/div>\n\n<\/div>\n\n\n\n<p>Test conditions: VIN = 48 V, VOUT = 12 V, DCR = 700 \u00b5\u03a9, L = 2.2 \u00b5H, TA = 25\u00b0C, 500 LFM airflow, top-side heatsink attached. Source: EPC application documentation.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>EPC90142 Development Board<\/strong><\/h3>\n\n\n\n<p>The EPC90142 is EPC\u2019s dedicated evaluation platform for both the EPC23101 and EPC2302 chipsets. It is a half-bridge evaluation board with a maximum voltage of 100V and maximum current of 65A, measuring 2.0\u201d x 2.0\u201d (50.8mm x 50.8mm) and contains all of the critical components required to immediately evaluate the switching performance, along with a set of Gerber files and a Bill of Materials (BOM) to expedite custom PCB development. This evaluation board is priced at $156.25 and is highly recommended as the first step in hardware verification prior to committing to custom PCB layout.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"epc23101_vs_epc2152_%e2%80%94_architecture_selection_guide\"><\/span><strong>EPC23101 vs. EPC2152 \u2014 Architecture Selection Guide<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"700\" height=\"420\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/ADS1115-Functional-Block-Diagram-8.png\" alt=\"EPC23101 vs. EPC2152\" class=\"wp-image-8363\" \/><\/figure>\n<\/div>\n\n\n<p>Engineers approaching EPC\u2019s product family for the first time often consider the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-full-half-bridge-drivers-epc-epc2152engrt-6f151669\">EPC2152<\/a> \u2014 a fully monolithic dual-FET half-bridge IC \u2014 alongside the EPC23101 chipset. The two architectures represent fundamentally different design trade-offs, and the right choice depends primarily on output current requirements, available PCB area, and whether asymmetric RDS(on) optimisation between the high-side and low-side transistors is needed.<\/p>\n\n\n\n<div style=\"max-width: 1100px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #fdba74\">\n\n  <table style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #1f2937;min-width: 700px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #f97316, #fb923c);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #ea580c\">\n      EPC23101 + EPC2302 vs EPC2152 \u2014 Design Tradeoff Comparison\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #fb923c, #fdba74);color: white\">\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #fed7aa;width: 30%\">Criteria<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #fed7aa;width: 35%\">EPC23101 + EPC2302 (Chipset)<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #fed7aa;width: 35%\">EPC2152 (Monolithic)<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#fff7ed\">\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">HS FET RDS(on) Typical<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">2.6 m\u03a9<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">8.5 m\u03a9 (symmetric)<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">LS FET RDS(on) Typical<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">1.4 m\u03a9<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">8.5 m\u03a9 (symmetric)<\/td>\n      <\/tr>\n\n      <tr style=\"background:#fff7ed\">\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">Max Output Current<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">65 A<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">Lower \u2014 suitable for &lt;20 A<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">Package Footprint<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">7 mm \u00d7 5 mm (two devices)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">3.85 \u00d7 2.59 mm (one device)<\/td>\n      <\/tr>\n\n      <tr style=\"background:#fff7ed\">\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">FET Design Flexibility<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5\">Independent HS\/LS selection<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5\">Fixed symmetric FETs<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">BOM Complexity<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">2 ICs<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">1 IC<\/td>\n      <\/tr>\n\n      <tr style=\"background:#fff7ed\">\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">Design Engineering Effort<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">Moderate<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;text-align:center\">Lower<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5;font-weight:600\">Best Application Fit<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5\">&gt;20 A, 48 V bus, high power density<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffedd5\">&lt;20 A, ultra-compact, cost-sensitive<\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#fff7ed;border-top:1px solid #fdba74;font-size:0.85rem;color:#9a3412;font-family:'Segoe UI', system-ui\">\n    <strong>Insight:<\/strong> The chipset approach delivers superior efficiency and current capability, while monolithic solutions excel in simplicity, compactness, and cost optimization.\n  <\/div>\n\n<\/div>\n\n\n\n<div style=\"max-width: 1000px;margin: 2.5rem auto;background: #fff7ed;border-radius: 12px;border: 1px solid #fdba74\">\n\n  <!-- Header -->\n  <div style=\"padding: 14px 20px;background: linear-gradient(135deg, #fb923c, #fdba74);color: white;font-family: 'Segoe UI', system-ui;border-bottom: 3px solid #f97316\">\n    <span style=\"font-size: 0.85rem;font-weight: 700;letter-spacing: 0.6px;text-transform: uppercase\">Key Technical Point<\/span>\n  <\/div>\n\n  <!-- Content -->\n  <div style=\"padding: 18px 22px;font-family: 'Segoe UI', system-ui;color: #7c2d12;line-height: 1.7;font-size: 0.95rem;background:#fffaf0\">\n\n    <p style=\"margin-bottom: 10px\">\n      <strong>Select the EPC23101 chipset<\/strong> when output current requirements exceed approximately \n      <span style=\"background:#fed7aa;color:#7c2d12;padding:2px 8px;border-radius:12px;font-weight:600\">20 A<\/span>, \n      when asymmetric <strong>RDS(on)<\/strong> optimization is beneficial (the LS FET conducts longer in high duty-cycle buck converters), \n      when operating a three-phase motor drive that requires a balanced floating half-bridge, \n      or when the application benefits from the independently measurable and replaceable high-side and low-side components.\n    <\/p>\n\n    <p>\n      The <strong>EPC2152<\/strong> remains the better choice for highly space-constrained designs below 20 A, \n      where <span style=\"background:#ffe0b2;color:#78350f;padding:2px 8px;border-radius:12px;font-weight:600\">BOM simplicity<\/span> \n      and board area outweigh conduction loss reduction.\n    <\/p>\n\n  <\/div>\n\n  <!-- Footer note -->\n  <div style=\"padding: 12px 20px;background:#fff1e6;border-top:1px solid #fdba74;font-size:0.82rem;color:#9a3412;font-family:'Segoe UI', system-ui\">\n    \u26a1 <strong>Insight:<\/strong> Choose the chipset based on current requirements and space constraints for optimal efficiency and flexibility.\n  <\/div>\n\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"application_circuits_reference_designs\"><\/span><strong>Application Circuits &amp; Reference Designs<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>EPC has launched various reference designs showing the EPC23101 in all of its main application fields. Each reference design provides characterised data regarding the efficiency data, Gerber files, and a Bill of Materials (BOM). The four principal areas of application are outlined below.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Application 1 \u2014 48 V DC-DC Buck Converter (Data Centre \/ AI Infrastructure)<\/strong><\/h3>\n\n\n\n<p>The EPC23101 and EPC23002 Chipset are primarily used for high-density datacenter point of load (POL) power conversion, as well as some high-density computing shelves, datacom equipment, and AI accelerator boards. The 97% efficiency at 500 kHz of this chipset will save significantly on cooling costs and increase the power density of racks that utilize these chips versus comparable silicon-based (Si) MOSFET solutions.<\/p>\n\n\n\n<p>Operating at 500 kHz-1 MHz instead of 300-400 kHz, typical to silicon MOSFET designs, allows for about a proportional decrease in output inductor and filter capacitance versus the increase in frequency, which results in a measurably smaller magnetic footprint. The combination of the EPC23101\/EPC23002&#8217;s output capability (65A), size (7mm x 5mm), and &lt; 50 \u00b0C temperature rise at rated current makes them ideally suited to the new architectures provided by 48V busses being implemented in hyperscale datacenters today.<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"700\" height=\"420\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/ADS1115-Functional-Block-Diagram-7.png\" alt=\"Simplified 48V to 12V synchronous buck converter schematic featuring EPC23101 and EPC2302 half-bridge, including bootstrap capacitor CBOOT, RBOOT, gate resistor RDRV, VIN decoupling capacitors, output inductor, and PWM controller interface based on EPC90142 reference design\" class=\"wp-image-8360\" \/><\/figure>\n<\/div>\n\n\n<h3 class=\"wp-block-heading\"><strong>Application 2 \u2014 Three-Phase BLDC Motor Drive (E-Mobility, Robotics, Drones)<\/strong><\/h3>\n\n\n\n<p>The EPC9173 reference design presents the EPC23101 utilized as a tri-phase inverter in the 48 V brushless DC (BLDC) motor driving applications for e-bikes, e-scooters, robotic arms, industrial drones, and power tools. Each phase leg uses two EPC23101 ICs with cross-connected PWM signals \u2014 a configuration that is less obvious than a simple driver + two FET arrangement, and that delivers a specific performance advantage worth understanding in detail.<\/p>\n\n\n\n<p>In the standard configuration, the EPC23101 drives its internal High-Side <a href=\"https:\/\/en.wikipedia.org\/wiki\/Field-effect_transistor\">FET<\/a> from HSIN, while the EPC2302 drives its High-Side FET and gate driver from LSIN. When used in the <a href=\"https:\/\/epc-co.com\/epc\/portals\/0\/epc\/documents\/guides\/EPC9173_qsg.pdf\">EPC9173<\/a> cross-connected motor drive, this interconnection changes: the PWM signal for the opposite switch is fed into the Low-Side Input of one EPC23101. The first EPC23101\u2019s external LG_OUT then drives the internal High-Side FET of the second EPC23101. This configuration forms balanced half-bridges where both switches float relative to power ground, enabling simple source shunt current measurement without any ground bounce at the PWM input nodes.<\/p>\n\n\n\n<p>The EPC9173 board also incorporates a configurable over-current protection circuit that can function as either a hard over-current shutdown or a current-limiting function, depending on the motor controller algorithm and modulation strategy.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Application 3 \u2014 Bidirectional 48 V\/14 V Converter (EPC9170)<\/strong><\/h3>\n\n\n\n<p>The EPC9170 is a bidirectional DC-DC converter that can run on two separate phases. One is a 48V power bus, while the other is a 12V-14V power source for vehicles and industrial systems. It provides 2 kW of continuous power at a switching frequency of 500 kHz. Using GaN FETs results in low power loss during operation with efficiencies above 96.5% for output currents between 60A and 110A (as measured at the output terminals). For a maximum current of 140A, the converter operates at 95.8% efficiency. The EPC23101 includes integration of the gate driver within the IC, providing lower parasitic losses compared to using a discrete driver + FET combination, which ultimately leads to improved converter efficiency figures.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Application 4 \u2014 Solar MPPT and Industrial Power Converters<\/strong><\/h3>\n\n\n\n<p>Maximum power point tracking (MPPT) converters for photovoltaic (PV) systems have very high switching frequencies due to their need to dynamically track the current\/voltage (I-V) curve of a solar array and operate at high efficiency over a wide range of input power levels. The EPC23101 chipset can handle 48V solar string inputs and has adequate structural voltage (100V) for transient protection while load switching and during disturbances on the grid to ensure continuous operation. Additionally, this device has low switching losses to enable high efficiency during partial load conditions when the converter will typically operate at less than rated power for the majority of its operational hours.<\/p>\n\n\n\n<figure class=\"wp-block-embed is-type-video is-provider-youtube wp-block-embed-youtube wp-embed-aspect-16-9 wp-has-aspect-ratio\"><div class=\"wp-block-embed__wrapper\">\n<iframe loading=\"lazy\" title=\"EPC23101 GaN Power Stage Explained | Ultra-Fast Switching &amp; Pinout Guide (GaN vs Silicon)\" width=\"1778\" height=\"1000\" src=\"https:\/\/www.youtube.com\/embed\/idQK3MVRZ28?feature=oembed\" frameborder=\"0\" allow=\"accelerometer; autoplay; clipboard-write; encrypted-media; gyroscope; picture-in-picture; web-share\" referrerpolicy=\"strict-origin-when-cross-origin\" allowfullscreen><\/iframe>\n<\/div><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"pcb_layout_guidelines\"><\/span><strong>PCB Layout Guidelines<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>Compared to typical Si MOSFET designs\u2014where layout-related parasitic inductance has minimal impact\u2014the layout of GaN (gallium nitride) FETs becomes much more critical. At switching frequencies of 500 kHz to 1 MHz, poor layout can lead to significant ringing, reduced efficiency, increased electromagnetic interference (EMI), and even potential device damage. The guidelines below are based on the EPC90142 reference board layout and EPC application notes.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Power Loop Layout \u2014 Highest Priority<\/strong><\/h3>\n\n\n\n<p>&nbsp;The power loop can be defined as the parasitic inductance that is created by the path from the VIN decoupling capacitor(s) to the VIN pin of EPC23101, through the SW node, to the EPC2302 source, to PGND, and then back to the decoupling capacitor.&nbsp; Even a few nanohenries of inductance in this loop can significantly increase switching transients and output ringing.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>VIN-to-PGND decoupling ceramic capacitors should be placed right next to the VIN and PGND pads of both devices. Even a trace length of just 3 mm can introduce enough inductance to affect GaN switching performance.<\/li>\n\n\n\n<li>The EPC23101 and EPC2302 HS\/LS pinouts are specifically designed to work together with each other to create an optimal vertical power loop. The VIN pad on the EPC23101 directly aligns with the PGND pad on the EPC2302; therefore, no special routing is required to create a minimum loop area.<\/li>\n\n\n\n<li>Use copper pours on inner layers to shorten return current paths and reduce loop area in the vertical dimension.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Gate Drive Loop Layout<\/strong><\/h3>\n\n\n\n<p>The low-side gate drive loop, consisting of the LGOUT connection to the EPC2302 gate, the EPC2302 kelvin source, and AGND, should be kept as short and low inductance as possible. If this path includes common source inductance, it can introduce a negative feedback effect that delays device turn-on and temporarily reduces the effective gate drive voltage. Although the integrated gate drive buffers within the EPC23101 reduce this effect compared to discrete drivers, minimizing the physical length of this loop remains critical for optimal performance.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Route the LGOUT trace to the EPC2302 gate using the shortest possible path, ideally keeping the total trace length under 5 mm.<\/li>\n\n\n\n<li>Place the RBOOT and RDRV resistors directly at the tuning pins of their respective ICs, rather than at the FET gate. To function effectively, these resistors must remain in series with the IC\u2019s internal drive impedance, rather than being separated by trace inductance.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Bootstrap Capacitor Placement<\/strong><\/h3>\n\n\n\n<p>The CBOOT capacitor, connected between the VBOOT and VPHASE pins,&nbsp; should be placed as close to the integrated circuit (IC) as possible to minimize series inductance. Insufficient capacitance or poor placement can cause VBOOT to drop below the under-voltage lockout (UVLO) threshold during extended high-side on-times. As noted in the <a href=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101_datasheet.pdf\">datasheet<\/a> footnote for the maximum pulse width (PWMAX), if the CBOOT value is below the recommended level, the high-side driver may not remain on long enough before VBOOT falls below the UVLO threshold. Designers must therefore ensure that the maximum high-side pulse width remains within their required duty cycle limits.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Thermal Management<\/strong><\/h3>\n\n\n\n<p>The EPC23101 dissipates most of its heat through its top pad. When combined with a properly selected thermal interface material (TIM), a heat sink or heat spreader serves as the primary thermal path. Without forced convection, the thermal resistance from junction to ambient is significantly higher; therefore, designs operating above 40 A in ambient temperatures of 40\u00b0C or higher should incorporate at least 200\u2013500 LFM of airflow. Thermal derating curves in the datasheet define the maximum allowable current and switching frequency as functions of ambient temperature and airflow, making it essential to review these curves before finalizing the operating conditions.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"errata_known_limitations\"><\/span><strong>Errata &amp; Known Limitations<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<div style=\"max-width: 1150px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #fda4af\">\n\n  <table style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #1f2937;min-width: 750px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #dc2626, #f43f5e);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #b91c1c\">\n      EPC23101 Errata &amp; Critical Design Issues \u2014 Must Read\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #f43f5e, #fb7185);color: white\">\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #fecdd3;width: 12%\">#<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #fecdd3;width: 26%\">Issue<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #fecdd3;width: 26%\">Impact<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #fecdd3;width: 36%\">Required Mitigation<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#fff1f2\">\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6;text-align:center;font-weight:700;color:#b91c1c\">ERR-1<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Max operating VIN must not exceed 60 V (datasheet implies 100 V)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Device overstress and potential failure above 60 V operating VIN<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Limit operating VIN to \u226460 V at all conditions including startup transients and input regulation extremes<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6;text-align:center;font-weight:700;color:#b91c1c\">ERR-2<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Max transient voltage at SW node must not exceed 70 V<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">SW ringing above 70 V may damage the device<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Use RBOOT \u2265 3.3 \u03a9 and RDRV \u2265 3.3 \u03a9 to limit switching spikes to &lt;\u00b110 V from rail\/GND<\/td>\n      <\/tr>\n\n      <tr style=\"background:#fff1f2\">\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6;text-align:center;font-weight:700;color:#b91c1c\">ERR-3<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Input pulses shorter than PW_MIN may cause latch-up events<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">IC may latch in undefined state; potential shoot-through risk<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Filter narrow PWM pulses at HSIN\/LSIN and ensure controller minimum on-time exceeds PW_MIN<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6;text-align:center;font-weight:700;color:#b91c1c\">ERR-4<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Boost mode feed-through increases reverse conduction voltage (&gt;4 V typical)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Higher dissipation; risk of thermal runaway in non-switching boost mode<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ffe4e6\">Add external Schottky diode across top GaN FET during boost operation<\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#fff1f2;border-top:1px solid #fda4af;font-size:0.85rem;color:#7f1d1d;font-family:'Segoe UI', system-ui\">\n    <strong>\u26a0 Critical:<\/strong> These errata conditions directly affect reliability and safe operation. Always validate your PCB layout, switching behavior, and transient conditions under worst-case scenarios.\n  <\/div>\n\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"frequently_asked_questions_about_the_epc23101_gan_fet\"><\/span>Frequently Asked Questions About the EPC23101 GaN FET<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<div class=\"schema-faq wp-block-yoast-faq-block\"><div class=\"schema-faq-section\" id=\"faq-question-1775473980344\"><strong class=\"schema-faq-question\">What external components does the EPC23101 require?<\/strong> <p class=\"schema-faq-answer\">A single 5 V (VDRV) supply with VDRV bypass, CBOOT, RBOOT\/RDRV (\u22653.3 \u03a9), VIN decoupling capacitors, and an external low-side FET (EPC2302).<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1775474457991\"><strong class=\"schema-faq-question\">Can the EPC23101 be operated at 100 V VIN?<\/strong> <p class=\"schema-faq-answer\">No, the maximum operating VIN is 60 V (Errata v1.2), while 100 V is only the breakdown rating.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1775474477056\"><strong class=\"schema-faq-question\">How is dead time programmed for the EPC23101?<\/strong> <p class=\"schema-faq-answer\">Dead time is set by the PWM controller via HSIN and LSIN, with internal cross-conduction protection as a safety feature.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1775474519378\"><strong class=\"schema-faq-question\">What is the minimum PWM pulse width the EPC23101 processes correctly?<\/strong> <p class=\"schema-faq-answer\">Pulses shorter than ~15 ns are filtered, so PWM on\/off times must exceed PW_MIN to avoid latch-up.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1775474556820\"><strong class=\"schema-faq-question\">How does the EPC23101 compare to a discrete gate driver plus GaN FET solution?<\/strong> <p class=\"schema-faq-answer\">It offers lower parasitics, no reverse recovery loss, and smaller size, but with limited gate drive voltage flexibility.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1775474570962\"><strong class=\"schema-faq-question\">What is the correct startup sequence for the EPC23101?<\/strong> <p class=\"schema-faq-answer\">Apply VDRV first, then VIN, and allow a short delay (~6 cycles) for CBOOT charging before normal operation.<\/p> <\/div> <\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"pre-layout_design_checklist\"><\/span><strong>Pre-Layout Design Checklist<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The following checklist consolidates the most critical design requirements for the EPC23101, incorporating all errata items. Use this as a gate review before committing to a PCB layout or production release.<\/p>\n\n\n\n<div style=\"max-width: 1100px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #bef264\">\n\n  <table style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #1f2937;min-width: 700px\">\n\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #65a30d, #84cc16);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #4d7c0f\">\n      EPC23101 Design Validation Checklist \u2014 Final Verification\n    <\/caption>\n\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #84cc16, #a3e635);color: white\">\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #d9f99d;width: 75%\">Checkpoint<\/th>\n        <th style=\"padding: 12px;text-align: center;border-bottom: 2px solid #d9f99d;width: 25%\">Status<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#f7fee7\">\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">Operating VIN confirmed \u226460 V at all conditions including startup transients (Errata ERR-1)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#b91c1c\">Required<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">RBOOT \u2265 3.3 \u03a9 and RDRV \u2265 3.3 \u03a9 at both gate drive tuning pins (Errata ERR-2)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#b91c1c\">Required<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f7fee7\">\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">SW node transient voltage verified \u226470 V under worst-case switching (Errata ERR-2)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#b91c1c\">Required<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">PWM controller minimum on-time and off-time exceed PW_MIN at all duty cycles and frequencies (Errata ERR-3)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#b91c1c\">Required<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f7fee7\">\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">Schottky diode added across top GaN FET if boost mode or bidirectional feed-through is used (Errata ERR-4)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#0369a1\">If applicable<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">CBOOT value selected to keep VBOOT above UVLO threshold at maximum high-side duty cycle<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#b91c1c\">Required<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f7fee7\">\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">VIN decoupling capacitors placed immediately adjacent to IC power pads (power loop minimisation)<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#15803d\">Best practice<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">LGOUT to EPC2302 gate trace minimised; RDRV placed at RDRV pin, not at FET gate<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#15803d\">Best practice<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f7fee7\">\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">AGND and PGND connected at single external star point; AGND return routed separately from high-current PGND<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#15803d\">Best practice<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">Thermal management validated: heatsink \/ TIM selected, derating curves reviewed for TA &gt; 25\u00b0C operation<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#b91c1c\">Required<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f7fee7\">\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">EPC23101 Errata Sheet v1.2 (April 4, 2024) reviewed by lead design engineer<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#b91c1c\">Required<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb\">EPC90142 development board evaluated before custom PCB first spin<\/td>\n        <td style=\"padding:12px;border-bottom:1px solid #ecfccb;text-align:center;font-weight:600;color:#0369a1\">Recommended<\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#f7fee7;border-top:1px solid #bef264;font-size:0.85rem;color:#365314;font-family:'Segoe UI', system-ui\">\n    <strong>Final Note:<\/strong> Completing all required checkpoints ensures safe, reliable, and high-performance operation of the EPC23101-based power stage in real-world conditions.\n  <\/div>\n\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"conclusion\"><\/span><strong>Conclusion<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The EPC23101 is an important development in GaN (Gallium Nitride) power conversion technology. It is characterized by a 2.6 m\u03a9 high-side GaN FET and a half-bridge gate driver plus support circuitry manufactured together in a small QFN package, which simplifies the design process, takes less space on a printed circuit board, and reduces issues with parasitic effects that have been inhibiting the adoption of GaN-based technologies. Engineers who are already familiar with using MOSFET gate drivers will find the EPC23101 + EPC2302 chipset an easy upgrade path that uses a CMOS-compatible interface that requires only 1 external 5V power supply.<\/p>\n\n\n\n<p>Key features of the chipset include 97% efficiency with a 48V to 12V synchronous buck converter at 500kHz, providing 65A in an area of 7mm x 5mm with very little thermal rise. This chipset provides a great solution for data center, drone and robotics applications as well as solar MPPT designers looking for higher power density.<\/p>\n\n\n\n<p>The maximum VIN voltage rating is 60 V, and a minimum gate resistor value of 3.3 \u03a9 must be used to meet specs. If these conditions are not met, the device could operate in an unsafe manner. PCB layout is very important to achieve the theoretical performance of the chip, so proper design is paramount.<\/p>\n\n\n\n<p>For engineers transitioning from Si MOSFETs or upgrading from EPC2152 devices, the EPC23101 + EPC2302 chipset offers significant efficiency improvements in high-current (&gt;20 A) and high-frequency (&gt;500 kHz) applications. When operated within specified limits and implemented with proper layout techniques, these devices provide a highly effective solution for power conversion in industrial and data center environments.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Key Technical Point<\/strong><\/h3>\n\n\n\n<div style=\"max-width: 1000px;margin: 2.5rem auto;background: #f0fdfa;border-radius: 12px;border: 1px solid #22d3ee\">\n\n  <!-- Header -->\n  <div style=\"padding: 14px 20px;background: linear-gradient(135deg, #06b6d4, #22d3ee);color: white;font-family: 'Segoe UI', system-ui;border-bottom: 3px solid #0e7490\">\n    <span style=\"font-size: 0.85rem;font-weight: 700;letter-spacing: 0.6px;text-transform: uppercase\">Key Technical Point<\/span>\n  <\/div>\n\n  <!-- Content -->\n  <div style=\"padding: 18px 22px;font-family: 'Segoe UI', system-ui;color: #064e3b;line-height: 1.7;font-size: 0.95rem;background:#e0f2f1\">\n\n    <p style=\"margin-bottom: 10px\">\n      <strong>Bottom line for design teams:<\/strong> the <strong>EPC23101 + EPC2302 chipset<\/strong> achieves \n      <span style=\"background:#a5f3fc;color:#064e3b;padding:2px 8px;border-radius:12px;font-weight:600\">97% efficiency<\/span> \n      and <span style=\"background:#a5f3fc;color:#064e3b;padding:2px 8px;border-radius:12px;font-weight:600\">65 A output<\/span> \n      in a <span style=\"background:#a5f3fc;color:#064e3b;padding:2px 8px;border-radius:12px;font-weight:600\">7 \u00d7 5 mm footprint<\/span> at 500 kHz. \n      The performance is real and reproducible on EPC\u2019s reference hardware.\n    <\/p>\n\n    <p>\n      The critical constraints are equally real: \n      <span style=\"background:#bdf7f2;color:#064e3b;padding:2px 6px;border-radius:10px;font-weight:600\">cap VIN at 60 V<\/span>, \n      <span style=\"background:#bdf7f2;color:#064e3b;padding:2px 6px;border-radius:10px;font-weight:600\">set RBOOT and RDRV \u2265 3.3 \u03a9<\/span>, \n      verify your PWM controller\u2019s <span style=\"background:#bdf7f2;color:#064e3b;padding:2px 6px;border-radius:10px;font-weight:600\">minimum pulse width<\/span>, \n      and review the errata before your first PCB spin.\n    <\/p>\n\n  <\/div>\n\n  <!-- Footer note -->\n  <div style=\"padding: 12px 20px;background:#ccfbf1;border-top:1px solid #22d3ee;font-size:0.82rem;color:#065f46;font-family:'Segoe UI', system-ui\">\n    \u26a1 <strong>Tip:<\/strong> Following these guidelines ensures consistent high performance and avoids early-stage design pitfalls.\n  <\/div>\n\n<\/div>\n\n\n\n<figure class=\"wp-block-image size-full\"><a href=\"https:\/\/www.flywing-tech.com\/category\/integrated-circuits-ics\/pmic-full-half-bridge-drivers-1916278b\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"2160\" height=\"798\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/full-half-bridge-drivers-for-motor-and-power-control.png\" alt=\"full and half bridge driver ICs used for motor control, load driving, and switching applications in embedded and industrial electronic systems.\" class=\"wp-image-8422\" \/><\/a><\/figure>\n<\/div>","protected":false},"excerpt":{"rendered":"<p>The EPC23101 is a 100 V monolithic GaN IC from Efficient Power Conversion (EPC) that integrates a high-side eGaN FET (3.3 m\u03a9 RDS(on) max \/ 2.6 m\u03a9 typical), a half-bridge gate driver, input logic interface, level shifting, and synchronous bootstrap charging \u2014 all in a single thermally enhanced QFN. Paired with the EPC2302 external low-side [&hellip;]<\/p>\n","protected":false},"author":6,"featured_media":8419,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1136,378,380],"tags":[1140,1142,1144,1145,1139,1141,1138,1137,1143,1146],"class_list":["post-8316","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-gan-devices","category-parts-library","category-technical-tutorial","tag-100v-gan","tag-48v-dc-dc-converter","tag-65a-power-stage","tag-bldc-motor-drive","tag-epc23101","tag-epower-chipset","tag-gan-fet","tag-gan-ic","tag-high-efficiency-buck-converter","tag-motor-inverter"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.3 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\r\n<title>EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0 - Fly-Wing<\/title>\r\n<meta name=\"description\" content=\"EPC23101 GaN FET complete guide: pinout diagram, 3.3 m\u03a9 RDS(on) specs, half-bridge gate driver architecture, 97% efficiency data, errata v1.2 disclosure, and 48V DC-DC application circuits.\" \/>\r\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\r\n<link rel=\"canonical\" href=\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/\" \/>\r\n<meta property=\"og:locale\" content=\"en_US\" \/>\r\n<meta property=\"og:type\" content=\"article\" \/>\r\n<meta property=\"og:title\" content=\"EPC23101 GaN FET: Pinout, Features &amp; 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High-Efficiency Power Conversion Applications\u00a0\",\"datePublished\":\"2026-04-08T10:18:52+00:00\",\"dateModified\":\"2026-04-08T10:18:59+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/\"},\"wordCount\":5286,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#organization\"},\"image\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png\",\"keywords\":[\"100V GaN\",\"48V DC-DC Converter\",\"65A Power Stage\",\"BLDC Motor Drive\",\"EPC23101\",\"ePower Chipset\",\"GaN FET\",\"GaN IC\",\"High Efficiency Buck Converter\",\"Motor Inverter\"],\"articleSection\":[\"GaN Devices\",\"Parts Library\",\"Tutorials\"],\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#respond\"]}]},{\"@type\":[\"WebPage\",\"FAQPage\"],\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/\",\"url\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/\",\"name\":\"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0 - Fly-Wing\",\"isPartOf\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage\"},\"image\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png\",\"datePublished\":\"2026-04-08T10:18:52+00:00\",\"dateModified\":\"2026-04-08T10:18:59+00:00\",\"description\":\"EPC23101 GaN FET complete guide: pinout diagram, 3.3 m\u03a9 RDS(on) specs, half-bridge gate driver architecture, 97% efficiency data, errata v1.2 disclosure, and 48V DC-DC application circuits.\",\"breadcrumb\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#breadcrumb\"},\"mainEntity\":[{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775473980344\"},{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474457991\"},{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474477056\"},{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474519378\"},{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474556820\"},{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474570962\"}],\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage\",\"url\":\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png\",\"contentUrl\":\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png\",\"width\":2610,\"height\":1200,\"caption\":\"EPC23101 GaN FET: Pinout, Features & High-Efficiency Power Conversion Applications\"},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\/\/www.flywing-tech.com\/blog\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"Parts Library\",\"item\":\"https:\/\/www.flywing-tech.com\/blog\/category\/parts-library\/\"},{\"@type\":\"ListItem\",\"position\":3,\"name\":\"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#website\",\"url\":\"https:\/\/www.flywing-tech.com\/blog\/\",\"name\":\"Fly-Wing\",\"description\":\"Electronic Components Source @Fly-Wing\",\"publisher\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\/\/www.flywing-tech.com\/blog\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-US\"},{\"@type\":\"Organization\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#organization\",\"name\":\"Fly-wing Technology (HK) Co., Limited\",\"alternateName\":\"Fly-wing Technology\",\"url\":\"https:\/\/www.flywing-tech.com\/blog\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/logo\/image\/\",\"url\":\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2025\/06\/512_512.png\",\"contentUrl\":\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2025\/06\/512_512.png\",\"width\":512,\"height\":512,\"caption\":\"Fly-wing Technology (HK) Co., Limited\"},\"image\":{\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/logo\/image\/\"},\"sameAs\":[\"https:\/\/www.facebook.com\/profile.php?id=100090565081283\",\"https:\/\/x.com\/MIKEBigcoolguy\"]},{\"@type\":\"Person\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/person\/54b4930c1e0b706d6c16518160e005d6\",\"name\":\"Flywing Tech Blog\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"en-US\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/person\/image\/\",\"url\":\"https:\/\/secure.gravatar.com\/avatar\/9a308600c3831db1cce227412e91d8c3da5b59b4d2cadd2f172f5e8cf7e93e15?s=96&d=mm&r=g\",\"contentUrl\":\"https:\/\/secure.gravatar.com\/avatar\/9a308600c3831db1cce227412e91d8c3da5b59b4d2cadd2f172f5e8cf7e93e15?s=96&d=mm&r=g\",\"caption\":\"Flywing Tech Blog\"},\"description\":\"This blog is maintained by the editorial team at Fly-Wing Technology. We aim to share valuable insights on electronic components, industry trends, and practical engineering guides to support global developers and buyers.\",\"sameAs\":[\"https:\/\/www.flywing-tech.com\/blog\/\"],\"url\":\"https:\/\/www.flywing-tech.com\/blog\/author\/content_manager_03\/\"},{\"@type\":\"Question\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775473980344\",\"position\":1,\"url\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775473980344\",\"name\":\"What external components does the EPC23101 require?\",\"answerCount\":1,\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"A single 5 V (VDRV) supply with VDRV bypass, CBOOT, RBOOT\/RDRV (\u22653.3 \u03a9), VIN decoupling capacitors, and an external low-side FET (EPC2302).\",\"inLanguage\":\"en-US\"},\"inLanguage\":\"en-US\"},{\"@type\":\"Question\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474457991\",\"position\":2,\"url\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474457991\",\"name\":\"Can the EPC23101 be operated at 100 V VIN?\",\"answerCount\":1,\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"No, the maximum operating VIN is 60 V (Errata v1.2), while 100 V is only the breakdown rating.\",\"inLanguage\":\"en-US\"},\"inLanguage\":\"en-US\"},{\"@type\":\"Question\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474477056\",\"position\":3,\"url\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474477056\",\"name\":\"How is dead time programmed for the EPC23101?\",\"answerCount\":1,\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"Dead time is set by the PWM controller via HSIN and LSIN, with internal cross-conduction protection as a safety feature.\",\"inLanguage\":\"en-US\"},\"inLanguage\":\"en-US\"},{\"@type\":\"Question\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474519378\",\"position\":4,\"url\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474519378\",\"name\":\"What is the minimum PWM pulse width the EPC23101 processes correctly?\",\"answerCount\":1,\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"Pulses shorter than ~15 ns are filtered, so PWM on\/off times must exceed PW_MIN to avoid latch-up.\",\"inLanguage\":\"en-US\"},\"inLanguage\":\"en-US\"},{\"@type\":\"Question\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474556820\",\"position\":5,\"url\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474556820\",\"name\":\"How does the EPC23101 compare to a discrete gate driver plus GaN FET solution?\",\"answerCount\":1,\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"It offers lower parasitics, no reverse recovery loss, and smaller size, but with limited gate drive voltage flexibility.\",\"inLanguage\":\"en-US\"},\"inLanguage\":\"en-US\"},{\"@type\":\"Question\",\"@id\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474570962\",\"position\":6,\"url\":\"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474570962\",\"name\":\"What is the correct startup sequence for the EPC23101?\",\"answerCount\":1,\"acceptedAnswer\":{\"@type\":\"Answer\",\"text\":\"Apply VDRV first, then VIN, and allow a short delay (~6 cycles) for CBOOT charging before normal operation.\",\"inLanguage\":\"en-US\"},\"inLanguage\":\"en-US\"}]}<\/script>\r\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0 - Fly-Wing","description":"EPC23101 GaN FET complete guide: pinout diagram, 3.3 m\u03a9 RDS(on) specs, half-bridge gate driver architecture, 97% efficiency data, errata v1.2 disclosure, and 48V DC-DC application circuits.","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/","og_locale":"en_US","og_type":"article","og_title":"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0 - Fly-Wing","og_description":"EPC23101 GaN FET complete guide: pinout diagram, 3.3 m\u03a9 RDS(on) specs, half-bridge gate driver architecture, 97% efficiency data, errata v1.2 disclosure, and 48V DC-DC application circuits.","og_url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/","og_site_name":"Fly-Wing","article_publisher":"https:\/\/www.facebook.com\/profile.php?id=100090565081283","article_published_time":"2026-04-08T10:18:52+00:00","article_modified_time":"2026-04-08T10:18:59+00:00","og_image":[{"width":2610,"height":1200,"url":"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png","type":"image\/png"}],"author":"Flywing Tech Blog","twitter_card":"summary_large_image","twitter_creator":"@MIKEBigcoolguy","twitter_site":"@MIKEBigcoolguy","twitter_misc":{"Written by":"Flywing Tech Blog","Est. reading time":"25 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#article","isPartOf":{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/"},"author":{"name":"Flywing Tech Blog","@id":"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/person\/54b4930c1e0b706d6c16518160e005d6"},"headline":"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0","datePublished":"2026-04-08T10:18:52+00:00","dateModified":"2026-04-08T10:18:59+00:00","mainEntityOfPage":{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/"},"wordCount":5286,"commentCount":0,"publisher":{"@id":"https:\/\/www.flywing-tech.com\/blog\/#organization"},"image":{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage"},"thumbnailUrl":"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png","keywords":["100V GaN","48V DC-DC Converter","65A Power Stage","BLDC Motor Drive","EPC23101","ePower Chipset","GaN FET","GaN IC","High Efficiency Buck Converter","Motor Inverter"],"articleSection":["GaN Devices","Parts Library","Tutorials"],"inLanguage":"en-US","potentialAction":[{"@type":"CommentAction","name":"Comment","target":["https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#respond"]}]},{"@type":["WebPage","FAQPage"],"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/","url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/","name":"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0 - Fly-Wing","isPartOf":{"@id":"https:\/\/www.flywing-tech.com\/blog\/#website"},"primaryImageOfPage":{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage"},"image":{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage"},"thumbnailUrl":"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png","datePublished":"2026-04-08T10:18:52+00:00","dateModified":"2026-04-08T10:18:59+00:00","description":"EPC23101 GaN FET complete guide: pinout diagram, 3.3 m\u03a9 RDS(on) specs, half-bridge gate driver architecture, 97% efficiency data, errata v1.2 disclosure, and 48V DC-DC application circuits.","breadcrumb":{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#breadcrumb"},"mainEntity":[{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775473980344"},{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474457991"},{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474477056"},{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474519378"},{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474556820"},{"@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474570962"}],"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/"]}]},{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#primaryimage","url":"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png","contentUrl":"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/04\/epc23101-gan-fet.png","width":2610,"height":1200,"caption":"EPC23101 GaN FET: Pinout, Features & High-Efficiency Power Conversion Applications"},{"@type":"BreadcrumbList","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.flywing-tech.com\/blog\/"},{"@type":"ListItem","position":2,"name":"Parts Library","item":"https:\/\/www.flywing-tech.com\/blog\/category\/parts-library\/"},{"@type":"ListItem","position":3,"name":"EPC23101 GaN FET: Pinout, Features &amp; High-Efficiency Power Conversion Applications\u00a0"}]},{"@type":"WebSite","@id":"https:\/\/www.flywing-tech.com\/blog\/#website","url":"https:\/\/www.flywing-tech.com\/blog\/","name":"Fly-Wing","description":"Electronic Components Source @Fly-Wing","publisher":{"@id":"https:\/\/www.flywing-tech.com\/blog\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.flywing-tech.com\/blog\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-US"},{"@type":"Organization","@id":"https:\/\/www.flywing-tech.com\/blog\/#organization","name":"Fly-wing Technology (HK) Co., Limited","alternateName":"Fly-wing Technology","url":"https:\/\/www.flywing-tech.com\/blog\/","logo":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/logo\/image\/","url":"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2025\/06\/512_512.png","contentUrl":"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2025\/06\/512_512.png","width":512,"height":512,"caption":"Fly-wing Technology (HK) Co., Limited"},"image":{"@id":"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/logo\/image\/"},"sameAs":["https:\/\/www.facebook.com\/profile.php?id=100090565081283","https:\/\/x.com\/MIKEBigcoolguy"]},{"@type":"Person","@id":"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/person\/54b4930c1e0b706d6c16518160e005d6","name":"Flywing Tech Blog","image":{"@type":"ImageObject","inLanguage":"en-US","@id":"https:\/\/www.flywing-tech.com\/blog\/#\/schema\/person\/image\/","url":"https:\/\/secure.gravatar.com\/avatar\/9a308600c3831db1cce227412e91d8c3da5b59b4d2cadd2f172f5e8cf7e93e15?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/9a308600c3831db1cce227412e91d8c3da5b59b4d2cadd2f172f5e8cf7e93e15?s=96&d=mm&r=g","caption":"Flywing Tech Blog"},"description":"This blog is maintained by the editorial team at Fly-Wing Technology. We aim to share valuable insights on electronic components, industry trends, and practical engineering guides to support global developers and buyers.","sameAs":["https:\/\/www.flywing-tech.com\/blog\/"],"url":"https:\/\/www.flywing-tech.com\/blog\/author\/content_manager_03\/"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775473980344","position":1,"url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775473980344","name":"What external components does the EPC23101 require?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"A single 5 V (VDRV) supply with VDRV bypass, CBOOT, RBOOT\/RDRV (\u22653.3 \u03a9), VIN decoupling capacitors, and an external low-side FET (EPC2302).","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474457991","position":2,"url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474457991","name":"Can the EPC23101 be operated at 100 V VIN?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"No, the maximum operating VIN is 60 V (Errata v1.2), while 100 V is only the breakdown rating.","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474477056","position":3,"url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474477056","name":"How is dead time programmed for the EPC23101?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"Dead time is set by the PWM controller via HSIN and LSIN, with internal cross-conduction protection as a safety feature.","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474519378","position":4,"url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474519378","name":"What is the minimum PWM pulse width the EPC23101 processes correctly?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"Pulses shorter than ~15 ns are filtered, so PWM on\/off times must exceed PW_MIN to avoid latch-up.","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474556820","position":5,"url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474556820","name":"How does the EPC23101 compare to a discrete gate driver plus GaN FET solution?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"It offers lower parasitics, no reverse recovery loss, and smaller size, but with limited gate drive voltage flexibility.","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474570962","position":6,"url":"https:\/\/www.flywing-tech.com\/blog\/epc23101-gan-fet-pinout-features-high-efficiency-power-conversion-applications\/#faq-question-1775474570962","name":"What is the correct startup sequence for the EPC23101?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"Apply VDRV first, then VIN, and allow a short delay (~6 cycles) for CBOOT charging before normal operation.","inLanguage":"en-US"},"inLanguage":"en-US"}]}},"_links":{"self":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts\/8316","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/users\/6"}],"replies":[{"embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/comments?post=8316"}],"version-history":[{"count":9,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts\/8316\/revisions"}],"predecessor-version":[{"id":8424,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts\/8316\/revisions\/8424"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/media\/8419"}],"wp:attachment":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/media?parent=8316"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/categories?post=8316"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/tags?post=8316"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}