{"id":7993,"date":"2026-03-16T17:15:47","date_gmt":"2026-03-16T09:15:47","guid":{"rendered":"https:\/\/www.flywing-tech.com\/blog\/?p=7993"},"modified":"2026-03-17T18:05:33","modified_gmt":"2026-03-17T10:05:33","slug":"w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications","status":"publish","type":"post","link":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/","title":{"rendered":"W5500 Ethernet Controller IC: Complete Guide to Pinout, SPI Protocol, PCB Design &amp; IoT Applications"},"content":{"rendered":"<div class=\"fsc_text\">\n<div id=\"ez-toc-container\" class=\"ez-toc-v2_0_76 counter-hierarchy ez-toc-counter ez-toc-custom ez-toc-container-direction\">\r\n<div class=\"ez-toc-title-container\">\r\n<h2 class=\"ez-toc-title\" style=\"cursor:inherit\">Table of Contents<\/h2>\r\n<span class=\"ez-toc-title-toggle\"><a href=\"#\" class=\"ez-toc-pull-right ez-toc-btn ez-toc-btn-xs ez-toc-btn-default ez-toc-toggle\" aria-label=\"Toggle Table of Content\"><span class=\"ez-toc-js-icon-con\"><span class=\"\"><span class=\"eztoc-hide\" style=\"display:none;\">Toggle<\/span><span class=\"ez-toc-icon-toggle-span\"><svg style=\"fill: #023a85;color:#023a85\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" class=\"list-377408\" width=\"20px\" height=\"20px\" viewBox=\"0 0 24 24\" fill=\"none\"><path d=\"M6 6H4v2h2V6zm14 0H8v2h12V6zM4 11h2v2H4v-2zm16 0H8v2h12v-2zM4 16h2v2H4v-2zm16 0H8v2h12v-2z\" fill=\"currentColor\"><\/path><\/svg><svg style=\"fill: #023a85;color:#023a85\" class=\"arrow-unsorted-368013\" xmlns=\"http:\/\/www.w3.org\/2000\/svg\" width=\"10px\" height=\"10px\" viewBox=\"0 0 24 24\" version=\"1.2\" baseProfile=\"tiny\"><path d=\"M18.2 9.3l-6.2-6.3-6.2 6.3c-.2.2-.3.4-.3.7s.1.5.3.7c.2.2.4.3.7.3h11c.3 0 .5-.1.7-.3.2-.2.3-.5.3-.7s-.1-.5-.3-.7zM5.8 14.7l6.2 6.3 6.2-6.3c.2-.2.3-.5.3-.7s-.1-.5-.3-.7c-.2-.2-.4-.3-.7-.3h-11c-.3 0-.5.1-.7.3-.2.2-.3.5-.3.7s.1.5.3.7z\"\/><\/svg><\/span><\/span><\/span><\/a><\/span><\/div>\r\n<nav><ul class='ez-toc-list ez-toc-list-level-1 ' ><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-1\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#what_is_the_w5500_ethernet_controller_ic\" >What Is the W5500 Ethernet Controller IC?<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-2\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#w5500_pinout_%e2%80%94_complete_pin_description_lqfp48\" >W5500 Pinout \u2014 Complete Pin Description (LQFP48)<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-3\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#spi_interface_communication_protocol_of_w5500_ethernet_controller_ic\" >SPI Interface &amp; Communication Protocol of W5500 Ethernet Controller IC<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-4\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#w5500_in_iot_applications\" >W5500 in IoT Applications<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-5\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#w5500_with_arduino_microcontrollers\" >W5500 with Arduino &amp; Microcontrollers<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-6\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#w5500_vs_w5100_vs_w5100s_%e2%80%94_technical_comparison\" >W5500 vs W5100 vs W5100S \u2014 Technical Comparison<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-7\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#w5500_pcb_layout_hardware_design_guidelines\" >W5500 PCB Layout &amp; Hardware Design Guidelines<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-8\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#troubleshooting_common_issues\" >Troubleshooting &amp; Common Issues<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-9\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#w5500_vs_alternatives_%e2%80%94_market_context\" >W5500 vs Alternatives \u2014 Market Context<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-10\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#conclusion\" >Conclusion<\/a><\/li><li class='ez-toc-page-1 ez-toc-heading-level-2'><a class=\"ez-toc-link ez-toc-heading-11\" href=\"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#frequently_asked_questions\" >Frequently Asked Questions<\/a><\/li><\/ul><\/nav><\/div>\r\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"what_is_the_w5500_ethernet_controller_ic\"><\/span><strong>What Is the W5500 Ethernet Controller IC?<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The <strong>W5500 Ethernet Controller IC<\/strong> is a hardwired TCP\/IP embedded Ethernet controller from WIZnet. It combines a complete TCP\/IP stack, a 10\/100 Ethernet MAC, and a PHY in a single chip. It provides a means of direct Internet connection for microcontrollers through a high-speed SPI interface running at up to 80 MHz. Instead of running a software stack on the host microcontroller unit, the W5500 performs all TCP\/IP processing using dedicated hardware. It provides deterministic and reliable network operation at the firmware level.<\/p>\n\n\n\n<p>In practice, this architectural difference makes a substantial impact on the manner in which an Arduino or STM32 communicates with the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a>; in fact, the communication is done in the same way as accessing any other SPI-type device through reading and\/or writing registers. The W5500 does all framing, acknowledgments, retransmissions, and ARP resolution independently. Once the host MCU issues a SEND command, the W5500 takes care of delivering a verified TCP segment to the network.<\/p>\n\n\n\n<div class=\"w5500-spec-table-wrapper\" style=\"max-width: 900px;margin: 2rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #e5e7eb\">\n\n  <table class=\"w5500-spec-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.98rem;color: #1f2937\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #2563eb, #1d4ed8);color: white;font-size: 1.18rem;font-weight: 600;text-align: left;border-bottom: 3px solid #1e40af\">\n      Key Technical Specifications \u2014 W5500 Ethernet Controller IC\n    <\/caption>\n    <thead>\n      <tr style=\"background: #3b82f6;color: white\">\n        <th style=\"padding: 14px 18px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.92rem;border-bottom: 2px solid #2563eb\">Parameter<\/th>\n        <th style=\"padding: 14px 18px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.92rem;border-bottom: 2px solid #2563eb\">Value<\/th>\n        <th style=\"padding: 14px 18px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.92rem;border-bottom: 2px solid #2563eb\">Source Verified<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f8fafc\">\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">Host Interface<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">SPI (Mode 0 and Mode 3), up to 80 MHz<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">Sockets<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">8 independent hardware sockets<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr style=\"background: #f8fafc\">\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">Internal Buffer<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">32 KB TX\/RX memory, configurable per socket<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">Ethernet Speed<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">10BASE-T \/ 100BASE-TX, auto-negotiation<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr style=\"background: #f8fafc\">\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">Duplex<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">Full and half duplex<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">Supply Voltage<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">3.3V (2.97V \u2013 3.63V operating range)<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr style=\"background: #f8fafc\">\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">I\/O Signal Tolerance<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">5V tolerant on all SPI and digital I\/O pins<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #e5e7eb\">Package<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #e5e7eb\">48-pin LQFP, 7\u00d77 mm, 0.5 mm pitch, lead-free<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem;border-bottom: 1px solid #e5e7eb\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n      <tr style=\"background: #f8fafc\">\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #1e40af\">Operating Temperature<\/td>\n        <td style=\"padding: 14px 18px\">\u221240\u00b0C to +85\u00b0C<\/td>\n        <td style=\"padding: 14px 18px;color: #4b5563;font-style: italic;font-size: 0.94rem\">WIZnet Datasheet v1.10<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Supported Hardwired Protocols<\/strong><\/h3>\n\n\n\n<p>All of the protocols TCP, UDP, ICMP, IPv4, ARP, IGMP, and PPPoE are implemented in the W5500 hardware alone. One design specification that engineers need to consider when dealing with large payloads is that the W5500 does <strong>not<\/strong> support IP fragmentation. In addition, there is currently no support for IPv6, and all IPv6 functionality will be handled by the successor IC (W6100).<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Feature Highlights<\/strong><\/h3>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>8 independent sockets<\/strong> \u2014 Every socket serves as a TCP\/UDP connection with it is own register space, TX buffer, RX buffer. All 8 sockets can be enabled at the same time. So you can run protocols concurrently such as MQTT, HTTP, Modbus TCP and DNS, all at the same time.&nbsp;<\/li>\n\n\n\n<li><strong>32 KB configurable buffer memory<\/strong> \u2014 The total memory space allocated to TX\/RX buffers is divided evenly across sockets at 1 KB increments based on the value of Sn_TXBUF_SIZE and Sn_RXBUF_SIZE register settings. A design requiring one high speed socket can allocate up to 16 KB of memory and utilize the balance of the memory for other sockets.<\/li>\n\n\n\n<li><strong>5V I\/O signal tolerance<\/strong> \u2014 All SPI and digital I\/O pins (GPIOs) are designed to accept 5V logic levels which allows for direct connections to existing 5V based Arduino and AVR systems without the need for any level converting hardware.<\/li>\n\n\n\n<li><strong>Wake on LAN (WOL) via Magic Packet over UDP<\/strong> \u2014 The chip can wake from power-down mode on receipt of a standard Magic Packet, reducing idle power consumption to approximately 0.6 mA.<\/li>\n\n\n\n<li><strong>LED outputs<\/strong> \u2014 There are several indicators with open drain outputs that can be used to indicate whether they are operating in full or half duplex mode, link status, speed (10 vs. 100), and active status. In most cases, these indicators are directly connected to commonly available LED\u2019s through a series current limiting resistor.<\/li>\n\n\n\n<li><strong>Power-down mode<\/strong> \u2014 reduces operating current significantly for battery-powered or energy-harvesting IoT nodes.<\/li>\n<\/ul>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"800\" height=\"450\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500-Ethernet-Controller-IC-6.png\" alt=\"W5500 Ethernet Controller IC LQFP48 package and internal block diagram showing SPI interface, TCP\/IP core, 8-socket register map, 32KB TX\/RX buffer, MAC and PHY layers.\" class=\"wp-image-8003\" \/><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Why Engineers Choose the W5500 Over a Software Stack<\/strong><\/h3>\n\n\n\n<p>Software-based TCP\/IP stacks such as lwIP running on an STM32 consume valuable MCU cycles, SRAM, and flash. Interrupt-based packet processing can interfare with application code execution. Stack usage can differ depending on the load. The W5500 eliminates all such issues. Engineers can use the W5500 for networking using simple socket commands over an SPI bus. Engineers can read and write registers and data buffers directly. There is no IP stack library to port, optimize, and debug. This is the main reason why the W5500 has remained the undisputed leader in resource-constrained embedded Ethernet solutions for over a decade in production environments.<\/p>\n\n\n\n<p>The W5500 is suitable for wired IoT sensor networks, industrial control system controllers, serial-to-Ethernet converters, remote I\/O devices, building automation gateways, and all other applications where wireless RF connectivity is either unavailable or unreliable.<\/p>\n\n\n\n<p><strong>Note on throughput:<\/strong> The PHY of the W5500 is rated for 100 Mbps,&nbsp; the actual TCP throughput is limited by the speed of the SPI interface, as well as the socket buffer management strategy, rather than the PHY speed. The actual measured performance figures, as well as the factors affecting them, are covered in  (SPI Performance &amp; Throughput).<\/p>\n\n\n\n<p>A solid understanding of the W5500 pinout is a fundamental prerequisite for correct schematic capture, PCB layout, as well as firmware bring-up. Any incorrect connections, e.g., a swap of MOSI\/MISO, a lack of a connection for the TOCAP, or a floating state for the EXRES1, can cause a lack of SPI response or a flaky PHY link. This section lists all 48 pins from the official WIZnet Datasheet v1.1.0, grouped by functional category, with important notes extending beyond the information provided within the datasheet table.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"w5500_pinout_%e2%80%94_complete_pin_description_lqfp48\"><\/span><strong>W5500 Pinout \u2014 Complete Pin Description (LQFP48)<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Package Overview &amp; Pin Orientation<\/strong><\/h3>\n\n\n\n<p>The W5500 Ethernet Controller IC is housed in a 48-pin lead-free package with an LQFP footprint. The dimensions are 7\u00d77 mm with a 0.5 mm pin pitch. It is important to understand that there is no QFN package for the W5500. This is a common error found in the datasheets of third-party sources, which is actually a legacy of the W5200 IC. All footprint and land pattern design must be based on the dimensions of the LQFP48 package as defined in <a href=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500_ds_v110e.pdf\">Datasheet v1.1.0<\/a>.<\/p>\n\n\n\n<p><strong>Pin numbering convention: <\/strong>Pin 1 is located at the top-left corner of the IC (marked with a dot or a chamfer on the package). The numbering of the pins is done clockwise when viewed from above. The sides are defined as follows:<\/p>\n\n\n\n<div class=\"w5500-pinout-table-wrapper\" style=\"max-width: 860px;margin: 2rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #d1fae5\">\n\n  <table class=\"w5500-pinout-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #0f766e, #115e59);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 3px solid #0f766e\">\n      W5500 LQFP48 Package \u2013 Pin Side Summary\n    <\/caption>\n    <thead>\n      <tr style=\"background: #0f766e;color: white\">\n        <th style=\"padding: 14px 18px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.92rem;border-bottom: 2px solid #0d9488\">Side<\/th>\n        <th style=\"padding: 14px 18px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.92rem;border-bottom: 2px solid #0d9488\">Pins<\/th>\n        <th style=\"padding: 14px 18px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.92rem;border-bottom: 2px solid #0d9488\">Primary Functions<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #ecfdf5\">\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #0f766e;border-bottom: 1px solid #d1fae5\">Left<br>(bottom-left \u2192 top-left)<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #d1fae5\">1 \u2013 12<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #d1fae5\">PHY analog: TXP\/TXN, RXP\/RXN, AVDD, AGND, EXRES1<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #0f766e;border-bottom: 1px solid #d1fae5\">Top<br>(top-left \u2192 top-right)<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #d1fae5\">13 \u2013 24<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #d1fae5\">Analog bias, internal regulator, RSVD, SPDLED<\/td>\n      <\/tr>\n      <tr style=\"background: #ecfdf5\">\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #0f766e;border-bottom: 1px solid #d1fae5\">Right<br>(top-right \u2192 bottom-right)<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #d1fae5\">25 \u2013 36<\/td>\n        <td style=\"padding: 14px 18px;border-bottom: 1px solid #d1fae5\">LED outputs, VDD, GND, crystal, SPI interface, INTn<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 18px;font-weight: 600;color: #0f766e\">Bottom<br>(bottom-right \u2192 bottom-left)<\/td>\n        <td style=\"padding: 14px 18px\">37 \u2013 48<\/td>\n        <td style=\"padding: 14px 18px\">RSTn, RSVD, PMODE[2:0], NC, AGND<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n<\/div>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"800\" height=\"450\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500-Ethernet-Controller-IC-7.png\" alt=\"W5500 LQFP48 pinout diagram showing all 48 pins labeled by function group \u2014 PHY, SPI, power, crystal, LED, control.\" class=\"wp-image-8015\" \/><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>PHY Analog Interface Pins (Pins 1\u201311)<\/strong><\/h3>\n\n\n\n<p>These pins directly interface with the Ethernet magnetics (isolation transformer). These are analog differential signals, and these signals need to be routed as differential pairs of matched length. No digital signals should be routed close to these signals.<\/p>\n\n\n\n<div class=\"w5500-phy-pins-table-wrapper\" style=\"max-width: 980px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #e0e7ff\">\n\n  <table class=\"w5500-phy-pins-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #4f46e5, #4338ca);color: white;font-size: 1.18rem;font-weight: 600;text-align: left;border-bottom: 4px solid #4338ca\">\n      W5500 PHY Analog Interface Pins (Pins 1\u201311) \u2014 Critical Layout Notes\n    <\/caption>\n    <thead>\n      <tr style=\"background: #4f46e5;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #4338ca;width: 10%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #4338ca;width: 14%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #4338ca;width: 18%\">Type<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #4338ca\">Function &amp; Design Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">1<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">TXN<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">AO<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Transmit differential pair \u2014 negative. Connect to transformer TX winding.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">2<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">TXP<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">AO<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Transmit differential pair \u2014 positive. <strong>Match trace length to TXN within \u00b10.5 mm.<\/strong><\/td>\n      <\/tr>\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">3<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">AGND<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">GND<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Analog ground. Connect directly to analog ground plane.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">4<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">AVDD<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">PWR<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Analog 3.3V supply. Decouple with 100 nF ceramic + 10 \u00b5F bulk at pin.<\/td>\n      <\/tr>\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">5<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">RXN<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">AI<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Receive differential pair \u2014 negative. Connect to transformer RX winding.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">6<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">RXP<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">AI<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Receive differential pair \u2014 positive. <strong>Match trace length to RXN.<\/strong><\/td>\n      <\/tr>\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">7<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">DNC<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">AI\/O<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Do Not Connect. Leave floating \u2014 do not route to any net.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">8<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">AVDD<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">PWR<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Analog 3.3V supply. Second AVDD pin \u2014 decouple independently.<\/td>\n      <\/tr>\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">9<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">AGND<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">GND<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Analog ground.<\/td>\n      <\/tr>\n      <tr style=\"background: #fef3ff;border-left: 5px solid #7c3aed\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 700;color: #6d28d9;border-bottom: 1px solid #e0e7ff\">10<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 700;color: #6d28d9;border-bottom: 1px solid #e0e7ff\">EXRES1 \u26a0<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">AI\/O<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff;font-weight: 500\">\n          <strong style=\"color: #b91c1c\">Critical:<\/strong> External reference resistor. Must be connected to a <strong>12.4 k\u03a9 \u00b11%<\/strong> resistor to AGND. Required for biasing internal analog circuits. Omitting or using wrong value\/tolerance will cause PHY malfunction \u2014 one of the most common hardware design errors. See WIZnet Datasheet Figure 2 for exact reference circuit.\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">11<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #4338ca;border-bottom: 1px solid #e0e7ff\">AVDD<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0e7ff\">PWR<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0e7ff\">Analog 3.3V supply. Third AVDD pin \u2014 decouple independently.<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Analog Bias &amp; Internal Regulator Pins (Pins 12\u201322)<\/strong><\/h3>\n\n\n\n<p>These pins support the internal analog bias circuits and the on-chip 1.2V regulator. They require specific external passive components \u2014 omitting them is a guaranteed path to chip instability or no-start behavior.<\/p>\n\n\n\n<div class=\"w5500-analog-bias-table-wrapper\" style=\"max-width: 980px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #dcfce7\">\n\n  <table class=\"w5500-analog-bias-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #065f46, #047857);color: white;font-size: 1.18rem;font-weight: 600;text-align: left;border-bottom: 4px solid #065f46\">\n      W5500 Analog Bias &amp; Internal Regulator Pins (Pins 12\u201322) \u2014 Critical Passive Components\n    <\/caption>\n    <thead>\n      <tr style=\"background: #065f46;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #047857;width: 10%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #047857;width: 14%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #047857;width: 18%\">Type<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #047857\">Function &amp; Design Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f0fdf4\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">12<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">NC<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">\u2014<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">No connect. Leave floating.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">13<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">NC<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">\u2014<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">No connect. Leave floating.<\/td>\n      <\/tr>\n      <tr style=\"background: #f0fdf4\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">14<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">AGND<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">GND<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">Analog ground.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">15<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">AVDD<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">PWR<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">Analog 3.3V supply.<\/td>\n      <\/tr>\n      <tr style=\"background: #f0fdf4\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">16<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">AGND<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">GND<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">Analog ground.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">17<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">AVDD<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">PWR<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">Analog 3.3V supply.<\/td>\n      <\/tr>\n      <tr style=\"background: #f0fdf4\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">18<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">VBG<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">AO<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">Band-gap reference output. Measures 1.2V at 25\u00b0C. Must be left floating \u2014 do not connect to any net or capacitor.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">19<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">AGND<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">GND<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">Analog ground.<\/td>\n      <\/tr>\n      <tr style=\"background: #fefce8;border-left: 5px solid #b45309\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 700;color: #92400e;border-bottom: 1px solid #dcfce7\">20<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 700;color: #92400e;border-bottom: 1px solid #dcfce7\">TOCAP \u26a0<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">AO<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7;font-weight: 500\">\n          <strong style=\"color: #b91c1c\">Critical:<\/strong> External reference capacitor output. Must connect to a <strong>4.7 \u00b5F capacitor to AGND<\/strong>. Keep the trace to this capacitor as short as possible \u2014 trace inductance destabilizes internal signals.\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">21<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #b45309;border-bottom: 1px solid #dcfce7\">AVDD<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">PWR<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7\">Analog 3.3V supply.<\/td>\n      <\/tr>\n      <tr style=\"background: #fefce8;border-left: 5px solid #b45309\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 700;color: #92400e;border-bottom: 1px solid #dcfce7\">22<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 700;color: #92400e;border-bottom: 1px solid #dcfce7\">1V2O \u26a0<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dcfce7\">AO<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dcfce7;font-weight: 500\">\n          <strong style=\"color: #b91c1c\">Critical:<\/strong> Internal 1.2V regulator output. Must connect to a <strong>10 nF capacitor to GND<\/strong>. This is the output of the on-chip regulator \u2014 do not connect to any external supply rail.\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Reserved Pins (Pin 23, Pins 38\u201342)<\/strong><\/h3>\n\n\n\n<p>Pin 23 and pins 38\u201342 are marked RSVD (Reserved) in the datasheet and include an internal pull-down bias. They must connect to ground and must not be left floating, nor connected to any signal or power supply.<\/p>\n\n\n\n<p>If you violate this requirement it can cause the device to enter an undefined state of operation which could cause the device to behave unpredictably or not function correctly.<\/p>\n\n\n\n<div class=\"w5500-reserved-pins-table-wrapper\" style=\"max-width: 860px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #e2e8f0\">\n\n  <table class=\"w5500-reserved-pins-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #334155, #1e293b);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #334155\">\n      W5500 Reserved Pins (Pins 23, 38\u201342) \u2014 Must Be Tied to GND\n    <\/caption>\n    <thead>\n      <tr style=\"background: #334155;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e293b;width: 14%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e293b;width: 24%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e293b;width: 28%\">Internal Bias<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e293b\">Required Connection<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f1f5f9\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">23<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">RSVD<\/td>\n        <td style=\"padding: 14px 16px;color: #475569;border-bottom: 1px solid #e2e8f0\">Pull-down<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e2e8f0\">Tie to GND<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">38<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">RSVD<\/td>\n        <td style=\"padding: 14px 16px;color: #475569;border-bottom: 1px solid #e2e8f0\">Pull-down<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e2e8f0\">Tie to GND<\/td>\n      <\/tr>\n      <tr style=\"background: #f1f5f9\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">39<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">RSVD<\/td>\n        <td style=\"padding: 14px 16px;color: #475569;border-bottom: 1px solid #e2e8f0\">Pull-down<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e2e8f0\">Tie to GND<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">40<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">RSVD<\/td>\n        <td style=\"padding: 14px 16px;color: #475569;border-bottom: 1px solid #e2e8f0\">Pull-down<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e2e8f0\">Tie to GND<\/td>\n      <\/tr>\n      <tr style=\"background: #f1f5f9\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">41<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #92400e;border-bottom: 1px solid #e2e8f0\">RSVD<\/td>\n        <td style=\"padding: 14px 16px;color: #475569;border-bottom: 1px solid #e2e8f0\">Pull-down<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e2e8f0\">Tie to GND<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #92400e\">42<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #92400e\">RSVD<\/td>\n        <td style=\"padding: 14px 16px;color: #475569\">Pull-down<\/td>\n        <td style=\"padding: 14px 20px\">Tie to GND<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Optional small warning note below table -->\n  <div style=\"padding: 16px 20px;background: #fefce8;border-top: 1px solid #e2e8f0;color: #92400e;font-size: 0.95rem;font-weight: 500\">\n    <strong>Important:<\/strong> All Reserved (RSVD) pins have internal pull-downs and <strong>must be tied to GND<\/strong>. Leaving them floating or connecting to any other net\/signal will place the W5500 in an undefined or malfunctioning state.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>LED Output Pins (Pins 24\u201327)<\/strong><\/h3>\n\n\n\n<p>There are four dedicated pins for LEDs, which are SPDLED (Speed), LINKLED (Link), DUPLED (Duplex), and ACTLED (Activity). The LEDs are open-drain, active-low type. The LEDs must be connected with a current restriction resistor, which is generally 330 \u03a9 for normal 3 mA LEDs, to the 3.3 V supply rail. The resistor is used to restrict the current, with the positive end of the LED connected to the junction point of the resistor and the negative end of the LED connected to the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500 <\/a>pin.<\/p>\n\n\n\n<div class=\"w5500-led-pins-table-wrapper\" style=\"max-width: 860px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #fee2e2\">\n\n  <table class=\"w5500-led-pins-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #991b1b, #7f1d1d);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #991b1b\">\n      W5500 LED Output Pins (Pins 24\u201327) \u2014 Status Indicators\n    <\/caption>\n    <thead>\n      <tr style=\"background: #991b1b;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #7f1d1d;width: 14%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #7f1d1d;width: 18%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #7f1d1d;width: 24%\">Type<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #7f1d1d;width: 20%\">Indication<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #7f1d1d\">Logic Level<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #fef2f2\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">24<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">SPDLED<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #fee2e2\">O<\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #fee2e2\">Ethernet link speed<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #fee2e2\">LOW = 100 Mbps active \/ HIGH = 10 Mbps<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">25<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">LINKLED<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #fee2e2\">O<\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #fee2e2\">Physical link established<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #fee2e2\">LOW = Link up<\/td>\n      <\/tr>\n      <tr style=\"background: #fef2f2\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">26<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">DUPLED<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #fee2e2\">O<\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #fee2e2\">Duplex mode status<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #fee2e2\">LOW = Full duplex<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">27<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #991b1b;border-bottom: 1px solid #fee2e2\">ACTLED<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #fee2e2\">O<\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #fee2e2\">Ethernet packet activity<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #fee2e2\">LOW = TX\/RX activity<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Properly closed note div -->\n  <div style=\"padding: 16px 20px;background: #fef2f2;border-top: 1px solid #fee2e2;color: #991b1b;font-size: 0.95rem;font-weight: 500\">\n    <strong>Design Tip:<\/strong> All LED pins are open-drain, active-low outputs. Connect each through a current-limiting resistor (typically 330 \u03a9) to 3.3V. They can be left unconnected if no LEDs are required.\n  <\/div>\n\n<\/div>\n\n\n\n<p><strong>Design note:<\/strong> All four LED pins can be left unconnected if status LEDs are not required. If using a combo RJ45 module with integrated LEDs (e.g., HR911105A), check whether the module&#8217;s internal LEDs are driven by the magnetics side or need external connection to these pins. Do not rely on module LEDs without verifying the schematic.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Digital Power &amp; Ground (Pins 28\u201329)<\/strong><\/h3>\n\n\n\n<div class=\"w5500-power-ground-table-wrapper\" style=\"max-width: 860px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #dbeafe\">\n\n  <table class=\"w5500-power-ground-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #1e40af, #1e3a8a);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1e40af\">\n      W5500 Digital Power &amp; Ground Pins (Pins 28\u201329) \u2014 Supply &amp; Decoupling Notes\n    <\/caption>\n    <thead>\n      <tr style=\"background: #1e40af;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e3a8a;width: 14%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e3a8a;width: 14%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e3a8a;width: 18%\">Type<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1e3a8a\">Description<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #eff6ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #1e40af;border-bottom: 1px solid #dbeafe\">28<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #dbeafe\">VDD<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dbeafe\">PWR<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dbeafe\">\n          Digital 3.3V supply. Place 100 nF ceramic capacitor and 10 \u00b5F bulk capacitor within 0.5 mm of this pin. Separate VDD trace from AVDD trace \u2014 join only at the power entry point or power plane.\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #1e40af;border-bottom: 1px solid #dbeafe\">29<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #1e40af;border-bottom: 1px solid #dbeafe\">GND<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #dbeafe\">GND<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #dbeafe\">\n          Digital ground. Connect to digital ground plane.\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Optional practical note below table -->\n  <div style=\"padding: 16px 20px;background: #eff6ff;border-top: 1px solid #dbeafe;color: #1e40af;font-size: 0.95rem;font-weight: 500\">\n    <strong>Layout Rule Reminder:<\/strong> Keep digital VDD decoupling very close to pin 28 and maintain physical separation between VDD and AVDD traces until they meet at the main power entry point or a solid power plane. This prevents noise coupling into the sensitive analog PHY section.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Crystal &amp; Clock Input Pins (Pins 30\u201331)<\/strong><\/h3>\n\n\n\n<p>The W5500 requires a 25 MHz reference clock for its PHY. Two options exist:<\/p>\n\n\n\n<div class=\"w5500-crystal-pins-table-wrapper\" style=\"max-width: 860px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #fef3c7\">\n\n  <table class=\"w5500-crystal-pins-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #c2410c, #b45309);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #c2410c\">\n      W5500 Crystal &amp; Clock Input Pins (Pins 30\u201331) \u2014 Oscillator Requirements\n    <\/caption>\n    <thead>\n      <tr style=\"background: #c2410c;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #b45309;width: 14%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #b45309;width: 18%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #b45309;width: 18%\">Type<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #b45309\">Description<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #fffbeb\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #c2410c;border-bottom: 1px solid #fef3c7\">30<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #c2410c;border-bottom: 1px solid #fef3c7\">XI \/ CLKIN<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #fef3c7\">I<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #fef3c7\">\n          Crystal input, or external CMOS clock input (25 MHz).\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #c2410c;border-bottom: 1px solid #fef3c7\">31<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #c2410c;border-bottom: 1px solid #fef3c7\">XO<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #fef3c7\">O<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #fef3c7\">\n          Crystal output. Leave floating when using an external CMOS clock on XI\/CLKIN.\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Practical note below table -->\n  <div style=\"padding: 16px 20px;background: #fffbeb;border-top: 1px solid #fef3c7;color: #c2410c;font-size: 0.95rem;font-weight: 500\">\n    <strong>Clock Stability Tip:<\/strong> For crystal use, pair with 18\u201322 pF load capacitors (COG\/NPO type) placed close to pins. Keep traces &lt; 5 mm, use GND guard ring, and avoid routing digital signals nearby. External 25 MHz CMOS clock is a valid alternative \u2014 connect only to XI\/CLKIN and float XO.\n  <\/div>\n\n<\/div>\n\n\n\n<p><strong>Crystal circuit requirements:<\/strong><\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Fundamental mode 25 MHz Crystal, with load capacitance specified by the crystal manufacturer (18-22pF).&nbsp;<\/li>\n\n\n\n<li>The load capacitors should be connected between both XI and XO terminals to GND, as close to the crystals as possible (within 3 mm).&nbsp;<\/li>\n\n\n\n<li>A guard ring should be formed around the traces carrying the crystals, together with a GND ring connected to GND plane.&nbsp;<\/li>\n\n\n\n<li>No other signal traces should be routed under or near the crystal circuit.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>SPI Interface Pins (Pins 32\u201335)<\/strong><\/h3>\n\n\n\n<p>The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500 <\/a>SPI interface consists of four pins: SCSn (chip select, active low), SCLK (clock input), MISO (output from W5500 to host), and MOSI (input from host to W5500).<a href=\"https:\/\/lcsc.com\/product-detail\/Ethernet-ICs_WIZNET-W5500_C32843.html\">&nbsp;<\/a><\/p>\n\n\n\n<div class=\"w5500-spi-pins-table-wrapper\" style=\"max-width: 920px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #e0f2fe\">\n\n  <table class=\"w5500-spi-pins-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #0369a1, #075985);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #0369a1\">\n      W5500 SPI Interface Pins (Pins 32\u201335) \u2014 High-Speed Communication\n    <\/caption>\n    <thead>\n      <tr style=\"background: #0369a1;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #075985;width: 12%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #075985;width: 14%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #075985;width: 22%\">Direction<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #075985\">Description<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #0369a1;border-bottom: 1px solid #e0f2fe\">32<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #0369a1;border-bottom: 1px solid #e0f2fe\">SCSn<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0f2fe\">Input (Active Low)<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0f2fe\">\n          SPI chip select. Drive LOW before the first SCLK edge and hold LOW for the entire transaction. Pull HIGH between transactions via 10 k\u03a9 resistor to VDD. When HIGH, MISO enters high-impedance state.\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #0369a1;border-bottom: 1px solid #e0f2fe\">33<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #0369a1;border-bottom: 1px solid #e0f2fe\">SCLK<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0f2fe\">Input<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0f2fe\">\n          SPI clock from host MCU. Supports Mode 0 (CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). Maximum 80 MHz.\n        <\/td>\n      <\/tr>\n      <tr style=\"background: #f0f9ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #0369a1;border-bottom: 1px solid #e0f2fe\">34<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #0369a1;border-bottom: 1px solid #e0f2fe\">MISO<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #e0f2fe\">Output<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #e0f2fe\">\n          Data out from W5500 to host MCU. Enters high-impedance when SCSn is HIGH \u2014 safe for shared SPI buses.\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #0369a1\">35<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #0369a1\">MOSI<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280\">Input<\/td>\n        <td style=\"padding: 14px 20px\">\n          Data in from host MCU to W5500.\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Practical note below table -->\n  <div style=\"padding: 16px 20px;background: #f0f9ff;border-top: 1px solid #e0f2fe;color: #0369a1;font-size: 0.95rem;font-weight: 500\">\n    <strong>SPI Wiring Best Practice:<\/strong> Keep all SPI traces short (20 MHz). Use 22\u201333 \u03a9 series termination on SCLK and MOSI if traces exceed 3 cm at high speed. Pull SCSn HIGH with 10 k\u03a9 to VDD when idle. For 5V MCUs: direct connection is safe due to 5V tolerance, but consider 33 \u03a9 series resistors on SCLK\/MOSI for hot-plug protection.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Control &amp; Interrupt Pins (Pins 36\u201337)<\/strong><\/h3>\n\n\n\n<div class=\"w5500-control-pins-table-wrapper\" style=\"max-width: 920px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #f3e8ff\">\n\n  <table class=\"w5500-control-pins-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #6d28d9, #5b21b6);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #6d28d9\">\n      W5500 Control &amp; Interrupt Pins (Pins 36\u201337) \u2014 Reset &amp; Interrupt Handling\n    <\/caption>\n    <thead>\n      <tr style=\"background: #6d28d9;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #5b21b6;width: 12%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #5b21b6;width: 14%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #5b21b6;width: 24%\">Internal Bias \/ Direction<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #5b21b6\">Description<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f3e8ff\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #6d28d9;border-bottom: 1px solid #f3e8ff\">36<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #6d28d9;border-bottom: 1px solid #f3e8ff\">INTn<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #f3e8ff\">\u2014 \/ Output (Active Low)<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #f3e8ff\">\n          Interrupt output. Asserted LOW when any unmasked socket or global interrupt event occurs (TCP connection, data received, timeout, IP conflict, WOL). Connect to a GPIO interrupt-capable input on the host MCU. Pull up with 10 k\u03a9 to VDD if the MCU input does not have an internal pull-up.\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #6d28d9;border-bottom: 1px solid #f3e8ff\">37<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #6d28d9;border-bottom: 1px solid #f3e8ff\">RSTn<\/td>\n        <td style=\"padding: 14px 16px;color: #6b7280;border-bottom: 1px solid #f3e8ff\">Pull-up \/ Input (Active Low)<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #f3e8ff\">\n          Hardware reset. Must be held LOW for at least 500 \u00b5s to initiate a reset. After releasing HIGH, wait a minimum of 50 ms before the first SPI access to allow the internal PLL and PHY to stabilize. Drive from a GPIO pin or an RC power-on reset circuit.\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Practical note below table -->\n  <div style=\"padding: 16px 20px;background: #f3e8ff;border-top: 1px solid #f3e8ff;color: #6d28d9;font-size: 0.95rem;font-weight: 500\">\n    <strong>Recommended Usage:<\/strong> Always connect INTn to an MCU interrupt pin for efficient event handling (avoids constant polling). For RSTn, use a 10 k\u03a9 pull-up to VDD (internal pull-up exists but external is safer). Add a 0.1 \u00b5F capacitor from RSTn to GND if using RC reset for noise immunity.\n  <\/div>\n\n<\/div>\n\n\n\n<p><strong>Reset timing requirements summary:<\/strong><\/p>\n\n\n\n<div class=\"w5500-reset-timing-table-wrapper\" style=\"max-width: 860px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #e0f7fa\">\n\n  <table class=\"w5500-reset-timing-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #00695c, #004d40);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #00695c\">\n      W5500 Reset Timing Requirements \u2014 RSTn &amp; Software Reset\n    <\/caption>\n    <thead>\n      <tr style=\"background: #00695c;color: white\">\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #004d40;width: 45%\">Event<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #004d40;width: 25%\">Minimum Duration<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #004d40\">Recommended Practice<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #e0f7fa\">\n        <td style=\"padding: 14px 16px;font-weight: 500;color: #004d40;border-bottom: 1px solid #b2dfdb\">RSTn LOW assertion<\/td>\n        <td style=\"padding: 14px 16px;color: #00695c;font-weight: 600;border-bottom: 1px solid #b2dfdb\">500 \u00b5s<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b2dfdb\">Hold 1 ms for margin<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;font-weight: 500;color: #004d40;border-bottom: 1px solid #b2dfdb\">RSTn HIGH to first SPI access<\/td>\n        <td style=\"padding: 14px 16px;color: #00695c;font-weight: 600;border-bottom: 1px solid #b2dfdb\">No spec given<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b2dfdb\">Use 50 ms in firmware<\/td>\n      <\/tr>\n      <tr style=\"background: #e0f7fa\">\n        <td style=\"padding: 14px 16px;font-weight: 500;color: #004d40;border-bottom: 1px solid #b2dfdb\">Software reset (write 0x80 to MR)<\/td>\n        <td style=\"padding: 14px 16px;color: #00695c;font-weight: 600;border-bottom: 1px solid #b2dfdb\">N\/A<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b2dfdb\">Wait 1 ms before next SPI access<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Practical note below table -->\n  <div style=\"padding: 16px 20px;background: #e0f7fa;border-top: 1px solid #b2dfdb;color: #004d40;font-size: 0.95rem;font-weight: 500\">\n    <strong>Best Practice Summary:<\/strong> Always wait at least 50 ms after releasing RSTn HIGH before any SPI transaction (even if datasheet has no explicit minimum \u2014 this ensures PLL, PHY, and internal circuits stabilize). For software reset, write 0x80 to MR (Common Register 0x0000), then delay 1 ms minimum before reading\/writing other registers. Skipping these waits is a very common cause of initialization failures.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>PHY Mode Selection Pins (Pins 43\u201345)<\/strong><\/h3>\n\n\n\n<p>Pins PMODE0, PMODE1, and PMODE2 determine the PHY operating mode at power-on reset. All three have internal pull-ups. The default hardware state (all three floating\/pulled high: 111) enables all speeds with auto-negotiation \u2014 the correct setting for the vast majority of designs.<\/p>\n\n\n\n<div class=\"w5500-pmode-pins-table-wrapper\" style=\"max-width: 860px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #d1d5db\">\n\n  <table class=\"w5500-pmode-pins-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #111827, #1f2937);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #111827\">\n      W5500 PHY Mode Selection Pins (Pins 43\u201345) \u2014 Power-On Configuration\n    <\/caption>\n    <thead>\n      <tr style=\"background: #111827;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1f2937;width: 25%\">Pin #<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1f2937;width: 30%\">Symbol<\/th>\n        <th style=\"padding: 14px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1f2937;width: 25%\">Internal Bias<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #1f2937\">Description<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f3f4f6\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #10b981;border-bottom: 1px solid #d1d5db\">43<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #10b981;border-bottom: 1px solid #d1d5db\">PMODE2<\/td>\n        <td style=\"padding: 14px 16px;color: #4b5563;border-bottom: 1px solid #d1d5db\">Pull-up<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #d1d5db\">PHY mode selection bit 2 (MSB)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #10b981;border-bottom: 1px solid #d1d5db\">44<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #10b981;border-bottom: 1px solid #d1d5db\">PMODE1<\/td>\n        <td style=\"padding: 14px 16px;color: #4b5563;border-bottom: 1px solid #d1d5db\">Pull-up<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #d1d5db\">PHY mode selection bit 1<\/td>\n      <\/tr>\n      <tr style=\"background: #f3f4f6\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #10b981\">45<\/td>\n        <td style=\"padding: 14px 16px;font-weight: 600;color: #10b981\">PMODE0<\/td>\n        <td style=\"padding: 14px 16px;color: #4b5563\">Pull-up<\/td>\n        <td style=\"padding: 14px 20px\">PHY mode selection bit 0 (LSB)<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Helpful note below table -->\n  <div style=\"padding: 16px 20px;background: #f3f4f6;border-top: 1px solid #d1d5db;color: #10b981;font-size: 0.95rem;font-weight: 500\">\n    <strong>Default \/ Recommended:<\/strong> Leave all three PMODE pins floating (internal pull-ups set 111 = auto-negotiation enabled for all speeds &amp; duplex modes). Only hard-wire to specific values if you must force a fixed mode (e.g., legacy equipment without auto-negotiation). After reset, you can also override via PHYCFGR register (0x002E) in firmware.\n  <\/div>\n\n<\/div>\n\n\n\n<p><strong>PMODE[2:0] Configuration Table:<\/strong><\/p>\n\n\n\n<div class=\"w5500-pmode-config-table-wrapper\" style=\"max-width: 920px;margin: 2.5rem auto;background: white;border-radius: 12px;overflow: hidden;border: 1px solid #b3e5fc\">\n\n  <table class=\"w5500-pmode-config-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.97rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #1e3a8a, #111827);color: white;font-size: 1.16rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1e3a8a\">\n      W5500 PMODE[2:0] Configuration \u2014 PHY Operating Mode at Reset\n    <\/caption>\n    <thead>\n      <tr style=\"background: #1e3a8a;color: white\">\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #111827;width: 22%\">PMODE2<\/th>\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #111827;width: 22%\">PMODE1<\/th>\n        <th style=\"padding: 14px 16px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #111827;width: 22%\">PMODE0<\/th>\n        <th style=\"padding: 14px 20px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.5px;font-size: 0.92rem;border-bottom: 2px solid #111827\">PHY Mode<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #e0f7fa\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">10BASE-T Half-duplex, Auto-negotiation disabled<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">10BASE-T Full-duplex, Auto-negotiation disabled<\/td>\n      <\/tr>\n      <tr style=\"background: #e0f7fa\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">100BASE-T Half-duplex, Auto-negotiation disabled<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">100BASE-T Full-duplex, Auto-negotiation disabled<\/td>\n      <\/tr>\n      <tr style=\"background: #e0f7fa\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">100BASE-T Half-duplex, Auto-negotiation enabled<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">Not used<\/td>\n      <\/tr>\n      <tr style=\"background: #e0f7fa\">\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;font-weight: 600;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">0<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">Not used<\/td>\n      <\/tr>\n      <tr style=\"background: #e0f7fa;font-weight: 600\">\n        <td style=\"padding: 14px 16px;text-align: center;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 16px;text-align: center;color: #06b6d4;border-bottom: 1px solid #b3e5fc\">1<\/td>\n        <td style=\"padding: 14px 20px;border-bottom: 1px solid #b3e5fc\">\n          All capable, Auto-negotiation enabled <span style=\"color: #059669;font-weight: 700\">(default \/ recommended)<\/span>\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Practical note below table -->\n  <div style=\"padding: 16px 20px;background: #e0f7fa;border-top: 1px solid #b3e5fc;color: #0369a1;font-size: 0.95rem;font-weight: 500\">\n    <strong>Recommended Practice:<\/strong> Leave all three PMODE pins floating (internal pull-ups set to 111 = full auto-negotiation). This is the safest and most compatible setting for modern networks. Hard-wire specific values only for legacy equipment that doesn&#8217;t support auto-negotiation (rare today). Firmware can override this later via the PHYCFGR register (0x002E) if needed.\n  <\/div>\n\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Complete Pin Reference Table<\/strong><\/h3>\n\n\n\n<p>The table below is the authoritative pin reference for schematic capture. <\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:800px\">\n\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 10px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:16%\">Pin #<\/th>\n        <th style=\"padding:12px 10px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:18%\">Symbol<\/th>\n        <th style=\"padding:12px 10px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:14%\">Group<\/th>\n        <th style=\"padding:12px 10px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:10%\">Type<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Key Requirement<\/th>\n      <\/tr>\n    <\/thead>\n\n    <tbody>\n\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">1\u20132<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">TXN \/ TXP<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">PHY Analog<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">AO<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Differential TX pair to transformer<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">5\u20136<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">RXN \/ RXP<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">PHY Analog<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">AI<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Differential RX pair from transformer <\/td>\n      <\/tr>\n\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">7<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#6b7280;border-bottom:1px solid #e5e7eb\">DNC<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">\u2014<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">\u2014<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Do not connect \u2014 leave floating<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">10<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">EXRES1<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">PHY Bias<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">AI\/O<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">12.4 k\u03a9 \u00b11% to AGND \u2014 mandatory for PHY biasing<\/td>\n      <\/tr>\n\n      <tr style=\"background:#fff5f5\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">4, 8, 11, 15, 17, 21<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#dc2626;border-bottom:1px solid #e5e7eb\">AVDD<\/td>\n        <td style=\"padding:9px 10px;color:#dc2626;border-bottom:1px solid #e5e7eb\">Power<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">PWR<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">3.3 V analog supply \u2014 100 nF ceramic per pin independently<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">28<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#dc2626;border-bottom:1px solid #e5e7eb\">VDD<\/td>\n        <td style=\"padding:9px 10px;color:#dc2626;border-bottom:1px solid #e5e7eb\">Power<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">PWR<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">3.3 V digital supply \u2014 100 nF + 10 \u00b5F decoupling<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f3f4f6\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">3, 9, 14, 16, 19, 48<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#111827;border-bottom:1px solid #e5e7eb\">AGND<\/td>\n        <td style=\"padding:9px 10px;color:#111827;border-bottom:1px solid #e5e7eb\">Power<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">GND<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Analog ground plane \u2014 unified, low-impedance<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">29<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#111827;border-bottom:1px solid #e5e7eb\">GND<\/td>\n        <td style=\"padding:9px 10px;color:#111827;border-bottom:1px solid #e5e7eb\">Power<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">GND<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Digital ground plane<\/td>\n      <\/tr>\n\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">18<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">VBG<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">Analog Bias<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">AO<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Band-gap reference \u2014 <strong>float, do not connect to any net<\/strong><\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">20<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">TOCAP<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">Analog Bias<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">AO<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">4.7 \u00b5F to AGND \u2014 mandatory &lt; <\/td>\n      <\/tr>\n\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">22<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">1V2O<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">Regulator<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">AO<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">10 nF to GND \u2014 internal 1.2 V regulator output, mandatory<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">23, 38\u201342<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#6b7280;border-bottom:1px solid #e5e7eb\">RSVD<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">Reserved<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">I<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Tie all to GND \u2014 internal pull-down<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f3f4f6\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">12, 13, 46, 47<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#6b7280;border-bottom:1px solid #e5e7eb\">NC<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">\u2014<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">\u2014<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">No connect<\/td>\n      <\/tr>\n\n      <tr style=\"background:#faf5ff\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">24\u201327<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#8b5cf6;border-bottom:1px solid #e5e7eb\">SPDLED, LINKLED, DUPLED, ACTLED<\/td>\n        <td style=\"padding:9px 10px;color:#8b5cf6;border-bottom:1px solid #e5e7eb\">LED<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">O<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Open-drain status outputs \u2014 330 \u03a9 + LED to 3.3 V each<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">30<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">XI \/ CLKIN<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">Clock<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">I<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">25 MHz crystal input or 3.3 V CMOS clock<\/td>\n      <\/tr>\n\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">31<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#3b82f6;border-bottom:1px solid #e5e7eb\">XO<\/td>\n        <td style=\"padding:9px 10px;color:#3b82f6;border-bottom:1px solid #e5e7eb\">Clock<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">AO<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Crystal output <\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">32<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#10b981;border-bottom:1px solid #e5e7eb\">SCSn<\/td>\n        <td style=\"padding:9px 10px;color:#10b981;border-bottom:1px solid #e5e7eb\">SPI<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">I<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">SPI chip select, active-low \u2014 10 k\u03a9 pull-up to VDD<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">33<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#10b981;border-bottom:1px solid #e5e7eb\">SCLK<\/td>\n        <td style=\"padding:9px 10px;color:#10b981;border-bottom:1px solid #e5e7eb\">SPI<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">I<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">SPI clock \u2014 up to 80 MHz, Mode 0 or Mode 3<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">34<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#10b981;border-bottom:1px solid #e5e7eb\">MISO<\/td>\n        <td style=\"padding:9px 10px;color:#10b981;border-bottom:1px solid #e5e7eb\">SPI<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">O<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Data out from W5500 <\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">35<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#10b981;border-bottom:1px solid #e5e7eb\">MOSI<\/td>\n        <td style=\"padding:9px 10px;color:#10b981;border-bottom:1px solid #e5e7eb\">SPI<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">I<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Data in from host MCU<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">36<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#10b981;border-bottom:1px solid #e5e7eb\">INTn<\/td>\n        <td style=\"padding:9px 10px;color:#10b981;border-bottom:1px solid #e5e7eb\">Control<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">O<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Interrupt, active-low \u2014 10 k\u03a9 pull-up to VDD<\/td>\n      <\/tr>\n\n      <tr>\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">37<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#10b981;border-bottom:1px solid #e5e7eb\">RSTn<\/td>\n        <td style=\"padding:9px 10px;color:#10b981;border-bottom:1px solid #e5e7eb\">Control<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">I<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">Reset, active-low \u2014 hold \u2265 500 \u00b5s;<\/td>\n      <\/tr>\n\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:9px 10px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">43\u201345<\/td>\n        <td style=\"padding:9px 10px;font-weight:600;color:#10b981;border-bottom:1px solid #e5e7eb\">PMODE2\u20130<\/td>\n        <td style=\"padding:9px 10px;color:#10b981;border-bottom:1px solid #e5e7eb\">PHY Config<\/td>\n        <td style=\"padding:9px 10px;color:#6b7280;border-bottom:1px solid #e5e7eb\">I<\/td>\n        <td style=\"padding:9px 14px;border-bottom:1px solid #e5e7eb\">PHY mode select <\/td>\n      <\/tr>\n\n    <\/tbody>\n  <\/table>\n\n<\/div>\n\n\n\n<figure class=\"wp-block-image size-full\"><a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"2160\" height=\"270\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/w5500.png\" alt=\"WIZnet W5500 Ethernet controller IC \u2013 10\/100 Base-T TCP\/IP with SPI interface specifications and technical support at Flywing\" class=\"wp-image-8034\" \/><\/a><\/figure>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"spi_interface_communication_protocol_of_w5500_ethernet_controller_ic\"><\/span><strong>SPI Interface &amp; Communication Protocol<\/strong> of W5500 Ethernet Controller IC<span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The SPI interface is used as the single point of contact between the host MCU and all functions offered by the W5500 IC, including hardware TCP\/IP, sockets, networking, and buffer access functions. Knowledge of the SPI protocol of the W5500 is therefore a must, as this forms the basis of all firmware developed for this IC.<\/p>\n\n\n\n<p>The SPI interface of the W5500 IC is differentiated from other ICs that offer a simple SPI interface for their registers in that it follows a specific three-phase frame format for all its operations, whether it is a single byte write operation for a configuration byte or a full-length write of a TCP payload into the TX buffer. A good understanding of this format at a bit level is necessary to avoid the most common class of W5500 IC bring-up problems.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>SPI Operating Modes<\/strong> of W5500 Ethernet Controller IC<\/h3>\n\n\n\n<p>The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a> supports SPI Mode 0 (CPOL=0, CPHA=0) and SPI Mode 3 (CPOL=1, CPHA=1).<a href=\"https:\/\/octopart.com\/datasheet\/wiznet\/W5500\"> <\/a>In both modes, data is sampled on the rising edge of SCLK and shifted out on the falling edge. The distinction is only the idle state of SCLK: LOW in Mode 0, HIGH in Mode 3.<\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:600px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:20%\">SPI Mode<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:20%\">CPOL<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:20%\">CPHA<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:20%\">SCLK Idle Level<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Data Sampled On<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#0d9488\">Mode 0<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">0<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">0<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">LOW<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Rising edge<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#0d9488\">Mode 3<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">1<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">1<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">HIGH<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Rising edge<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#f9fafb;border-top:1px solid #e5e7eb;font-size:0.88rem;color:#4b5563;flex-wrap:wrap;gap:16px;align-items:center\">\n    <strong style=\"color:#111827;margin-right:4px\">Color key:<\/strong>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#0d9488;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#0d9488;font-weight:600\">Teal<\/span> \u2014 SPI Mode (commonly used with W5500)<\/span>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#6b7280;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#6b7280;font-weight:600\">Gray<\/span> \u2014 CPOL \/ CPHA values<\/span>\n  <\/div>\n<\/div>\n\n\n\n<p><strong>Implementation note:<\/strong> Most microcontroller SPI peripherals are in Mode 0 by default. Unless you have a specific reason for choosing Mode 3, such as sharing a bus with a Mode 3 device, set your host MCU SPI to Mode 0 and keep SCLK low when idle. Mixing SPI modes on a shared bus without control of chip select will corrupt every transaction on that bus.<\/p>\n\n\n\n<p>VDM and FDM are two SPI data modes supported by W5500: In Variable Length Data Mode, the host controls the length of the data frame with SCSn; in Fixed Length Data Mode, the length is fixed at 1, 2, or 4 bytes, depending on OM bits 1 and 0, respectively. VDM is recommended for standard usage, while FDM is available for use when the host cannot independently control SCSn, and WIZnet strongly advises against its use unless no alternative is possible.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>SPI Frame Format \u2014 The 3-Phase Structure<\/strong><\/h3>\n\n\n\n<p>This is the most technically critical section for any engineer implementing <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a> Ethernet Controller IC firmware from scratch. Every W5500 SPI transaction consists of exactly three phases: a 16-bit Address Phase, an 8-bit Control Phase, and an N-byte Data Phase.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"800\" height=\"450\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500-Ethernet-Controller-IC-8.png\" alt=\"W5500 SPI frame timing diagram showing Address Phase, Control Phase, and Data Phase waveforms across SCSn, SCLK, MOSI, and MISO.\" class=\"wp-image-8017\" \/><\/figure>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Phase 1 \u2014 Address (16 bits, MSB first)<\/strong><\/h4>\n\n\n\n<p>The Address Phase specifies the 16-bit offset address of the target register or memory location in the selected block. The 16-bit offset address value is transmitted in a sequence from the most-significant bit.<\/p>\n\n\n\n<p>Key points engineers frequently misunderstand:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The address is a relative offset address in a block rather than an absolute memory address. The address 0x0009 represents a register offset 0x0009 in a block selected by BSB bits in Phase 2.<\/li>\n\n\n\n<li>The W5500 automatically increments the address by 1 for sequential (burst) reads or writes in the Data Phase. Therefore, no address phase is required for a sequential access for each byte.<\/li>\n\n\n\n<li>The same address 0x0000 exists in many blocks and represents different registers according to the selected block by BSB.<\/li>\n<\/ul>\n\n\n\n<div class=\"wp-block-group\"><div class=\"wp-block-group__inner-container is-layout-constrained wp-block-group-is-layout-constrained\">\n<h4 class=\"wp-block-heading\"><strong>Phase 2 \u2014 Control Byte (8 bits)<\/strong><\/h4>\n\n\n\n<p>The 8-bit Control Phase is composed of Block Select bits BSB[4:0] in bits 7\u20133, the Read\/Write Access Mode bit RWB in bit 2, and SPI Operation Mode bits OM[1:0] in bits 1\u20130.<a href=\"https:\/\/octopart.com\/datasheet\/wiznet\/W5500\">&nbsp;<\/a><\/p>\n\n\n\n<p>Bit:&nbsp; [7] [6] [5] [4] [3]&nbsp; [2] &nbsp; [1] [0]<\/p>\n\n\n\n<p>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;|&#8212;&#8212;BSB[4:0]&#8212;&#8212;|&nbsp; RWB&nbsp; |&#8211;OM&#8211;|<\/p>\n\n\n\n<p><strong>BSB[4:0] \u2014 Block Select Bits (bits 7\u20133):<\/strong><\/p>\n\n\n\n<p>The Block Select bits select the target register or memory block to which the offset address set in the Address Phase belongs.<\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:700px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:25%\">BSB[4:0]<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Selected Block<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">00000<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Common Registers<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">00001<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 0 Register Block<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">00010<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 0 TX Buffer<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">00011<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 0 RX Buffer<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">00101<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 1 Register Block<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">00110<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 1 TX Buffer<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">00111<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 1 RX Buffer<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">01001<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 2 Register Block<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">01010<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 2 TX Buffer<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">01011<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 2 RX Buffer<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">01101<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 3 Register Block<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">\u2026<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Sockets 4\u20137 follow the same pattern<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">11101<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 7 Register Block<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">11110<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 7 TX Buffer<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600\">11111<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Socket 7 RX Buffer<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<p><strong>Critical:<\/strong> Any BSB value listed as Reserved in the datasheet will cause W5500 malfunction if used. Do not derive BSB values by arithmetic shortcuts without verifying against the datasheet table.<\/p>\n<\/div><\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>RWB \u2014 Read\/Write Access Mode Bit (bit 2):<\/strong><\/h4>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:600px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:30%\">RWB<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Operation<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb\">0<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Read access \u2014 W5500 drives MISO with data from selected address<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb\">1<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Write access \u2014 W5500 accepts data from MOSI and writes to selected address<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<p><strong>OM[1:0] \u2014 Operation Mode Bits (bits 1\u20130):<\/strong><\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:700px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:25%\">OM[1:0]<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:30%\">Mode<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Data Phase Length<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb\">00<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">VDM (Variable Length Data Mode)<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">N bytes, 1 \u2264 N; length determined by SCSn deassert<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb\">01<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">FDM \u2014 1 Byte<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Fixed 1 byte<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdf4\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb\">10<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">FDM \u2014 2 Bytes<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Fixed 2 bytes<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb\">11<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">FDM \u2014 4 Bytes<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Fixed 4 bytes<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<p>For all standard firmware using VDM, OM[1:0] is always 00.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Worked example \u2014 building a control byte:<\/strong><\/h4>\n\n\n\n<p>To write to the Socket 0 TX Buffer at address offset 0x0040:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>BSB = 00010 (Socket 0 TX Buffer)<\/li>\n\n\n\n<li>RWB = 1 (Write)<\/li>\n\n\n\n<li>OM = 00 (VDM)<\/li>\n\n\n\n<li>Control byte = 0b00010_1_00 = 0x14<\/li>\n<\/ul>\n\n\n\n<p>To read from Common Registers at address 0x0039 (VERSIONR):<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>BSB = 00000 (Common Registers)<\/li>\n\n\n\n<li>RWB = 0 (Read)<\/li>\n\n\n\n<li>OM = 00 (VDM)<\/li>\n\n\n\n<li>Control byte = 0b00000_0_00 = 0x00<\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Phase 3 \u2014 Data (N bytes, MSB first)<\/strong><\/h4>\n\n\n\n<p>In VDM mode, the length of the SPI data phase is controlled by the SCSn control signal. The data phase may be from 1 byte up to N bytes depending on when the host deasserts SCSn. Each byte is sent in the order of the most significant bit first (MSB first).<\/p>\n\n\n\n<p>The auto-increment behavior is the basis for efficient burst operations:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>Burst write:<\/strong> Assert SCSn \u2192 send Address \u2192 send Control (RWB=1) \u2192 clock out bytes 1 through N on MOSI \u2192 deassert SCSn. The W5500 writes byte 1 to the base address, byte 2 to base+1, byte 3 to base+2, and so on<\/li>\n\n\n\n<li><strong>Burst read:<\/strong> Assert SCSn \u2192 send Address \u2192 send Control (RWB=0) \u2192 clock N bytes on MISO \u2192 deassert SCSn. The W5500 outputs data from base address through base+N-1<\/li>\n<\/ul>\n\n\n\n<p>This burst capability is critical for throughput. Writing a 1460-byte TCP payload to the TX buffer in a single burst transaction (one SCSn assertion) is dramatically more efficient than 1460 individual single-byte SPI transactions.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Register Map &amp; Memory Organization<\/strong><\/h3>\n\n\n\n<p>The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a> Ethernet Controller IC address space is organized into logically separate blocks, each selected by the BSB field in the Control Phase. Understanding this organization is prerequisite to correctly constructing every SPI frame.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"800\" height=\"450\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500-Ethernet-Controller-IC-9.png\" alt=\"W5500 register and memory organization diagram showing common registers, socket registers, and TX\/RX buffer blocks with BSB values.\" class=\"wp-image-8018\" \/><\/figure>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Common Register Block (BSB = 00000)<\/strong><\/h4>\n\n\n\n<p>The Common Register block contains all global configuration registers including the Mode Register (MR), Gateway Address (GAR), Subnet Mask (SUBR), Source Hardware Address (SHAR), Source IP Address (SIPR), interrupt registers, retry time, PHY configuration, and the chip version register (VERSIONR).<a href=\"https:\/\/www.wiznet.hk\/en\/ethernet-controller\/12-w5500.html\">&nbsp;<\/a><\/p>\n\n\n\n<div class=\"w5500-common-register-table-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #e5e7eb\">\n\n  <table class=\"w5500-common-register-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #1f2937, #111827);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1f2937\">\n      W5500 Common Register Block \u2014 Key Global Configuration Registers\n    <\/caption>\n    <thead>\n      <tr style=\"background: #1f2937;color: white\">\n        <th style=\"padding: 12px 12px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 14%\">Address<\/th>\n        <th style=\"padding: 12px 12px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 18%\">Register<\/th>\n        <th style=\"padding: 12px 12px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 10%\">Width<\/th>\n        <th style=\"padding: 12px 12px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 10%\">Access<\/th>\n        <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151\">Description<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0000<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">MR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Mode Register \u2014 software reset (bit 7), PPPoE, ping block<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0001\u20130x0004<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">GAR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">4 bytes<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Gateway IP Address (e.g., 192.168.1.1)<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0005\u20130x0008<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">SUBR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">4 bytes<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Subnet Mask (e.g., 255.255.255.0)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0009\u20130x000E<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">SHAR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">6 bytes<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Source MAC Address (must be unique per device)<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x000F\u20130x0012<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">SIPR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">4 bytes<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Source IP Address<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0013\u20130x0014<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">INTLEVEL<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Interrupt Assert Wait Time<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0015<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">IR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Interrupt Register \u2014 global interrupt flags<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0016<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">IMR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Interrupt Mask Register<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0017<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">SIR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Socket Interrupt Register \u2014 which socket raised interrupt<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0018<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">SIMR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Socket Interrupt Mask Register<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0019\u20130x001A<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">RTR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Retry Time (default 0x07D0 = 200 ms)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x001B<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">RCR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Retry Count (default 8 retries)<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x002E<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">PHYCFGR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R\/W<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">PHY Configuration \u2014 link status, speed, duplex, reset<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0039<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">VERSIONR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">R<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Chip version \u2014 always reads 0x04 on W5500<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <!-- Color Legend (same as your main pinout table) -->\n  <div style=\"padding: 16px 20px;background: #f9fafb;border-top: 1px solid #e5e7eb;font-size: 0.94rem;color: #4b5563;line-height: 1.6\">\n    <strong>Note:<\/strong> This table covers only the Common Register Block (BSB = 00000). All addresses are relative to the selected block. Refer to the full datasheet for socket-specific registers (BSB = 00001, 00101, etc.).\n  <\/div>\n\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Socket Register Block (BSB = 00001 \/ 00101 \/ \u2026 per socket)<\/strong><\/h4>\n\n\n\n<p>Each of the 8 sockets has its own independent register block. All socket registers share the same offset address layout; the BSB value selects which socket&#8217;s registers are accessed.<\/p>\n\n\n\n<div class=\"w5500-socket-register-table-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #e5e7eb\">\n  <table class=\"w5500-socket-register-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111827\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #1f2937, #111827);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1f2937\">\n      W5500 Per-Socket Registers (Sn_*) \u2014 Socket n = 0..7\n    <\/caption>\n    <thead>\n      <tr style=\"background: #1f2937;color: white\">\n        <th style=\"padding: 12px 12px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 14%\">Offset<\/th>\n        <th style=\"padding: 12px 12px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 18%\">Register<\/th>\n        <th style=\"padding: 12px 12px;text-align: center;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 12%\">Width<\/th>\n        <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151\">Description<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0000<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_MR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Socket Mode \u2014 set protocol (TCP=0x01, UDP=0x02, MACRAW=0x04, IPRAW=0x03, \u2026)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0001<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_CR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Socket Command \u2014 OPEN, LISTEN, CONNECT, DISCON, CLOSE, SEND, RECV, SEND_KEEP, etc.<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0002<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_IR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Socket Interrupt \u2014 CON, DISCON, RECV, TIMEOUT, SEND_OK flags (write 1 to clear)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0003<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_SR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Socket Status \u2014 SOCK_CLOSED, SOCK_INIT, SOCK_LISTEN, SOCK_ESTABLISHED, SOCK_CLOSE_WAIT, etc.<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0004\u20130x0005<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_PORT<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Source port number for this socket<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x000C\u20130x000F<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_DIPR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">4 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Destination IP Address (TCP: connect target; UDP: send target)<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0010\u20130x0011<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_DPORT<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">Destination port number<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x001E<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_TXBUF_SIZE<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">TX buffer size in KB (0=0KB, 1=1KB, 2=2KB, 4=4KB, 8=8KB, 16=16KB)<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x001F<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_RXBUF_SIZE<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">RX buffer size in KB (same valid values as Sn_TXBUF_SIZE)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0020\u20130x0021<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_TX_FSR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">TX Free Size Register \u2014 bytes available to write<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0022\u20130x0023<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_TX_RD<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">TX Read Pointer (managed by W5500 chip)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0024\u20130x0025<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_TX_WR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">TX Write Pointer (managed by host firmware)<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0026\u20130x0027<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_RX_RSR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">RX Received Size Register \u2014 bytes available to read<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x0028\u20130x0029<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_RX_RD<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">RX Read Pointer (managed by host firmware)<\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 12px 12px;border-bottom: 1px solid #e5e7eb\">0x002A\u20130x002B<\/td>\n        <td style=\"padding: 12px 12px;font-weight: 600;border-bottom: 1px solid #e5e7eb\">Sn_RX_WR<\/td>\n        <td style=\"padding: 12px 12px;text-align: center;border-bottom: 1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding: 12px 16px;border-bottom: 1px solid #e5e7eb\">RX Write Pointer (managed by W5500 chip)<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding: 16px 20px;background: #f9fafb;border-top: 1px solid #e5e7eb;font-size: 0.94rem;color: #4b5563;line-height: 1.6\">\n    <strong>Note:<\/strong> All offsets are relative to the socket register block (BSB = 00001 + socket number \u00d7 0x20). Sn_MR must be written before Sn_CR = OPEN. Refer to the W5500 datasheet for full command and status value definitions.\n  <\/div>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Socket TX &amp; RX Buffer Blocks<\/strong> of W5500 Ethernet Controller IC<\/h4>\n\n\n\n<p>Each socket has two dedicated buffer blocks \u2014 TX and RX \u2014 addressed by their respective BSB values. The physical buffer space totals 32 KB, shared across all 8 sockets. Buffer allocation is configured via Sn_TXBUF_SIZE and Sn_RXBUF_SIZE registers before the socket is opened.<\/p>\n\n\n\n<div class=\"w5500-buffer-allocation-table-wrapper\" style=\"max-width: 1200px;margin: 2.5rem auto;background: white;border-radius: 12px;border: 1px solid #e5e7eb\">\n  <table class=\"w5500-buffer-allocation-table\" style=\"width: 100%;border-collapse: collapse;font-family: 'Segoe UI', system-ui, sans-serif;font-size: 0.95rem;color: #111827;min-width: 800px\">\n    <caption style=\"padding: 16px 20px;background: linear-gradient(135deg, #1f2937, #111827);color: white;font-size: 1.2rem;font-weight: 600;text-align: left;border-bottom: 4px solid #1f2937\">\n      W5500 Recommended TX\/RX Buffer Allocation Strategies\n    <\/caption>\n    <thead>\n      <tr style=\"background: #1f2937;color: white\">\n        <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151;width: 45%\">Allocation Strategy<\/th>\n        <th style=\"padding: 12px 16px;text-align: left;font-weight: 600;text-transform: uppercase;letter-spacing: 0.4px;font-size: 0.88rem;border-bottom: 2px solid #374151\">Use Case \/ Typical Application<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb;font-weight: 500\">\n          All 8 sockets: 2 KB TX + 2 KB RX each<br>\n          <small style=\"color: #6b7280\">(Total: 16 KB TX + 16 KB RX)<\/small>\n        <\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb\">\n          Balanced multi-socket applications<br>\n          \u2022 4 TCP + 4 UDP sockets<br>\u2022 General-purpose IoT \/ multiple clients<br>\u2022 Moderate throughput per connection\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb;font-weight: 500\">\n          Socket 0: 16 KB TX + 16 KB RX<br>\n          Sockets 1\u20137: 0 KB TX + 0 KB RX<br>\n          <small style=\"color: #6b7280\">(Total: 16 KB TX + 16 KB RX)<\/small>\n        <\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb\">\n          Maximum single-socket throughput<br>\n          \u2022 Large file transfer (HTTP\/FTP download\/upload)<br>\u2022 High-speed streaming (one direction)<br>\u2022 Bulk data logger \/ backup\n        <\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb;font-weight: 500\">\n          Socket 0: 8 KB TX + 8 KB RX<br>\n          Sockets 1\u20133: 4 KB TX + 4 KB RX each<br>\n          Sockets 4\u20137: 1 KB TX + 1 KB RX each<br>\n          <small style=\"color: #6b7280\">(Total: 8 + 3\u00d74 + 4\u00d71 = 24 KB TX \/ RX \u2014 requires 32 KB chip)<\/small>\n        <\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb\">\n          Mixed priority allocation<br>\n          \u2022 One high-bandwidth channel (e.g. firmware update, video stream)<br>\u2022 Several medium-priority control sockets<br>\u2022 Low-priority monitoring \/ heartbeat sockets<br>\u2022 Typical in industrial \n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb;font-weight: 500\">\n          Socket 0: 8 KB TX + 8 KB RX<br>\n          Socket 1: 4 KB TX + 4 KB RX<br>\n          Sockets 2\u20137: 1 KB TX + 1 KB RX each<br>\n          <small style=\"color: #6b7280\">(Total: 8 + 4 + 6\u00d71 = 18 KB TX \/ RX)<\/small>\n        <\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb\">\n          Common practical compromise<br>\n          \u2022 Primary high-speed socket<br>\u2022 One secondary reliable channel<br>\u2022 Multiple lightweight MQTT \n        <\/td>\n      <\/tr>\n      <tr style=\"background: #f9fafb\">\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb;font-weight: 500\">\n          Socket 0\u20133: 4 KB TX + 4 KB RX each<br>\n          Sockets 4\u20137: 0 KB<br>\n          <small style=\"color: #6b7280\">(Total: 16 KB TX + 16 KB RX)<\/small>\n        <\/td>\n        <td style=\"padding: 14px 16px;border-bottom: 1px solid #e5e7eb\">\n          Moderate multi-connection server<br>\n          \u2022 Up to 4 simultaneous TCP clients<br>\u2022 Web server + configuration + OTA + logging\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding: 16px 20px;background: #f9fafb;border-top: 1px solid #e5e7eb;font-size: 0.94rem;color: #4b5563;line-height: 1.6\">\n     <\/div>\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>SPI Initialization Sequence<\/strong><\/h3>\n\n\n\n<p>This is the most-searched PAA target for this topic and requires the highest precision. The sequence below is verified against WIZnet ioLibrary_Driver source code and the official datasheet.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Step 1 \u2014 Hardware Reset<\/strong><\/h4>\n\n\n\n<p>Assert RSTn LOW for a minimum period of 500 \u00b5s (it is recommended to use a 1 ms period to have some margin). Then make it HIGH. Wait 50 ms before any SPI access is attempted. This allows the internal PLL, PHY, and the 25 MHz crystal oscillator to settle. Not waiting long enough is the most common cause of initialization failure in environments where the firmware restarts without power-cycling the device.<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ Bare-metal C example\n\nGPIO_ResetPin(W5500_RST_PIN);\n\ndelay_ms(1);\n\nGPIO_SetPin(W5500_RST_PIN);\n\ndelay_ms(50);\u00a0 \/\/ Wait for PLL + PHY stabilization\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>Step 2 \u2014 Verify Chip Identity<\/strong><\/h4>\n\n\n\n<p>Read VERSIONR (Common Register, offset 0x0039). The returned value must be 0x04. Any other value \u2014 including 0x00 or 0xFF \u2014 means the SPI bus is not communicating correctly. Do not proceed with configuration if this check fails.<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ SPI transaction: BSB=00000, RWB=0, OM=00\n\n\/\/ Address: 0x0039, Control: 0x00\n\nuint8_t version = w5500_read_byte(0x0039, 0x00);\u00a0 \/\/ Returns 0x04\n\nif (version != 0x04) { \/* SPI error \u2014 halt and debug *\/ }\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>Step 3 \u2014 Write MAC Address (SHAR)<\/strong><\/h4>\n\n\n\n<p>Write the 6-byte MAC address to SHAR (Common Register offsets 0x0009-0x000E) using a burst write. Every device connected to a network should have a unique MAC address. The OUI prefix for all WIZnet devices is 00:08:DC. You can use this as a prefix for all WIZnet-based devices, or create a locally administered MAC address by setting bit 1 in the first byte to 1.<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\nuint8_t mac&#x5B;6] = {0x00, 0x08, 0xDC, 0x01, 0x02, 0x03};\n\n\/\/ Burst write: Address=0x0009, Control=BSB(00000)|RWB(1)|OM(00) = 0x04\n\nw5500_write_burst(0x0009, 0x04, mac, 6);\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>Step 4 \u2014 Write Network Configuration<\/strong><\/h4>\n\n\n\n<p>Write Gateway IP (GAR, 0x0001\u20130x0004), Subnet Mask (SUBR, 0x0005\u20130x0008), and Source IP (SIPR, 0x000F\u20130x0012) in sequence. All are burst writes to the Common Register block (BSB = 00000, RWB = 1).<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\nuint8_t gateway&#x5B;4] = {192, 168, 1, 1};\n\nuint8_t subnet&#x5B;4]\u00a0 = {255, 255, 255, 0};\n\nuint8_t ip&#x5B;4]\u00a0 \u00a0 \u00a0 = {192, 168, 1, 100};\n\nw5500_write_burst(0x0001, 0x04, gateway, 4);\u00a0 \/\/ GAR\n\nw5500_write_burst(0x0005, 0x04, subnet,\u00a0 4);\u00a0 \/\/ SUBR\n\nw5500_write_burst(0x000F, 0x04, ip,\u00a0 \u00a0 \u00a0 4);\u00a0 \/\/ SIPR\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>Step 5 \u2014 Allocate Socket Buffer Memory<\/strong><\/h4>\n\n\n\n<p>For each socket that will be used, set Sn_TXBUF_SIZE (offset 0x001E) and Sn_RXBUF_SIZE (offset 0x001F) in the socket&#8217;s register block. The default after reset is 2 KB per socket per direction (2 \u00d7 8 sockets = 16 KB per direction). Only change if a non-default allocation is needed.<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ Example: give Socket 0 a 4KB TX and 4KB RX buffer\n\n\/\/ Socket 0 Register block: BSB = 00001 \u2192 control = 0x0C for write\n\nw5500_write_byte(0x001E, 0x0C, 4);\u00a0 \/\/ Sn_TXBUF_SIZE = 4 KB\n\nw5500_write_byte(0x001F, 0x0C, 4);\u00a0 \/\/ Sn_RXBUF_SIZE = 4 KB\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>Step 6 \u2014 Configure Socket Mode<\/strong><\/h4>\n\n\n\n<p>Write the desired protocol to Sn_MR (offset 0x0000 in the socket register block).<\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:600px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:30%\">Sn_MR Value<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Protocol Mode<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#2563eb\">0x01<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">TCP<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#2563eb\">0x02<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">UDP<\/td>\n      <\/tr>\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#2563eb\">0x04<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">MACRAW (raw Ethernet frame access)<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Step 7 \u2014 Open the Socket<\/strong><\/h4>\n\n\n\n<p>Write 0x01 (OPEN command) to Sn_CR (offset 0x0001 in the socket register block). After the OPEN command, poll Sn_SR (offset 0x0003) until it returns the expected status:<\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:600px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:35%\">Protocol<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:30%\">Expected Sn_SR After OPEN<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Status Meaning<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">TCP<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600;color:#7c3aed\">0x13<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">SOCK_INIT<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">UDP<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600;color:#7c3aed\">0x22<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">SOCK_UDP<\/td>\n      <\/tr>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">MACRAW<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;font-weight:600;color:#7c3aed\">0x42<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">SOCK_MACRAW<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\nw5500_write_byte(0x0001, 0x0C, 0x01);\u00a0 \/\/ Sn_CR = OPEN\n\n\/\/ Poll Sn_SR until socket is ready\n\nuint8_t status;\n\ndo {\n\n\u00a0\u00a0\u00a0\u00a0status = w5500_read_byte(0x0003, 0x08);\u00a0 \/\/ Read Sn_SR\n\n} while (status != 0x13);\u00a0 \/\/ Wait for SOCK_INIT (TCP)\n<\/pre><\/div>\n\n\n<p><strong>Important:<\/strong> The W5500 clears Sn_CR automatically after processing a command. Do not write the next command until Sn_CR reads back as 0x00. Polling Sn_CR for 0x00 between commands is the correct production implementation pattern.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Complete SPI Read &amp; Write Function Reference (Bare-Metal C)<\/strong><\/h3>\n\n\n\n<p>The following functions represent the minimum correct implementation of W5500 SPI access in bare-metal C. All higher-level socket operations are built on these two primitives.<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/**\n\n\u00a0* W5500 SPI write \u2014 single byte, VDM mode\n\n\u00a0* @param addr \u00a0 16-bit offset address within selected block\n\n\u00a0* @param ctrl \u00a0 Control byte: BSB&#x5B;4:0] | RWB=1 | OM=00\n\n\u00a0* @param data \u00a0 Byte to write\n\n\u00a0*\/\n\nvoid w5500_write_byte(uint16_t addr, uint8_t ctrl, uint8_t data) {\n\n\u00a0\u00a0\u00a0\u00a0CS_LOW(); \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Assert SCSn\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(addr &gt;&gt; 8);\u00a0 \u00a0 \u00a0 \u00a0 \/\/ Address Phase: high byte\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(addr &amp; 0xFF);\u00a0 \u00a0 \u00a0 \/\/ Address Phase: low byte\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(ctrl | 0x04);\u00a0 \u00a0 \u00a0 \/\/ Control Phase: force RWB=1 (write)\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(data); \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Data Phase: 1 byte\n\n\u00a0\u00a0\u00a0\u00a0CS_HIGH();\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Deassert SCSn \u2014 marks frame end in VDM\n\n}\n\n\/**\n\n\u00a0* W5500 SPI read \u2014 single byte, VDM mode\n\n\u00a0* @param addr \u00a0 16-bit offset address within selected block\n\n\u00a0* @param ctrl \u00a0 Control byte: BSB&#x5B;4:0] | RWB=0 | OM=00\n\n\u00a0* @return \u00a0 \u00a0 \u00a0 Byte read from W5500\n\n\u00a0*\/\n\nuint8_t w5500_read_byte(uint16_t addr, uint8_t ctrl) {\n\n\u00a0\u00a0\u00a0\u00a0uint8_t result;\n\n\u00a0\u00a0\u00a0\u00a0CS_LOW();\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(addr &gt;&gt; 8);\u00a0 \u00a0 \u00a0 \u00a0 \/\/ Address Phase: high byte\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(addr &amp; 0xFF);\u00a0 \u00a0 \u00a0 \/\/ Address Phase: low byte\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(ctrl &amp; ~0x04); \u00a0 \u00a0 \/\/ Control Phase: force RWB=0 (read)\n\n\u00a0\u00a0\u00a0\u00a0result = SPI_Transfer(0x00);\u00a0 \u00a0 \/\/ Data Phase: clock out dummy byte, capture MISO\n\n\u00a0\u00a0\u00a0\u00a0CS_HIGH();\n\n\u00a0\u00a0\u00a0\u00a0return result;\n\n}\n\n\/**\n\n\u00a0* W5500 SPI burst write \u2014 N bytes, VDM mode\n\n\u00a0* @param addr \u00a0 Base 16-bit offset address\n\n\u00a0* @param ctrl \u00a0 Control byte: BSB&#x5B;4:0] | RWB=1 | OM=00\n\n\u00a0* @param data \u00a0 Pointer to source buffer\n\n\u00a0* @param len\u00a0 \u00a0 Number of bytes to write\n\n\u00a0*\/\n\nvoid w5500_write_burst(uint16_t addr, uint8_t ctrl,\n\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0const uint8_t *data, uint16_t len) {\n\n\u00a0\u00a0\u00a0\u00a0CS_LOW();\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(addr &gt;&gt; 8);\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(addr &amp; 0xFF);\n\n\u00a0\u00a0\u00a0\u00a0SPI_Transfer(ctrl | 0x04);\u00a0 \u00a0 \u00a0 \/\/ RWB=1\n\n\u00a0\u00a0\u00a0\u00a0for (uint16_t i = 0; i &lt; len; i++) {\n\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0SPI_Transfer(data&#x5B;i]);\u00a0 \u00a0 \u00a0 \/\/ W5500 auto-increments address each byte\n\n\u00a0\u00a0\u00a0\u00a0}\n\n\u00a0\u00a0\u00a0\u00a0CS_HIGH();\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ SCSn deassert terminates VDM burst\n\n}\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>MicroPython equivalent (Raspberry Pi Pico \/ RP2040):<\/strong> <\/h4>\n\n\n\n<p>MicroPython&#8217;s network.WIZNET5K() driver wraps all three phases internally. Engineers using MicroPython do not need to implement these primitives manually \u2014 the machine.SPI() bus and network.WIZNET5K(spi, cs, rst) constructor handle frame construction automatically. Refer to Section 5.3 for the full MicroPython initialization example.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"w5500_in_iot_applications\"><\/span><strong>W5500 in IoT Applications<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The benefit of the W5500 architecture, with its hardwired TCP\/IP stack that operates independently of the host MCU, is best utilized in IoT applications. This section describes the three most common IoT application scenarios that make use of the W5500 Ethernet Controller IC: wired gateway architecture, the use of MQTT with a persistent TCP connection, and Modbus\/TCP for industrial automation..<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>W5500 as a Wired IoT Gateway<\/strong><\/h3>\n\n\n\n<p>Engineers choosing between Wi-Fi and wired Ethernet have a common practical difficulty. There are trade-offs with Wi-Fi: it has variable latency, RF interference from other devices communicating on the same channel, and a software TCP\/IP stack that competes with an application for runtime on the CPU. The use of an Ethernet connection provides a stable and high-speed connection necessary for the real-time processing and communication required in IoT applications. In IoT applications requiring very high reliability and very low latency, using Ethernet has many advantages over using Wi-Fi.<\/p>\n\n\n\n<p>Specifically, the W5500 Ethernet Controller IC meets these requirements. The chip is able to offload all processing for TCP\/IP to its hardwired silicon so the host MCU can be used by the application to read sensors, perform control logic, or schedule RTOS tasks. This is the correct architecture for any gateway whose embedded application must support multiple parallel network sessions at the same time without degrading the MCU performance.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Practical socket allocation for a multi-protocol IoT gateway:<\/strong><\/h4>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:800px\">\n    <thead>\n      <tr style=\"background:#0f766e;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #115e59;width:18%\">Socket<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #115e59;width:22%\">Protocol<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #115e59\">Purpose \/ Typical Use<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#0f766e\">0<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">TCP Client<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">MQTT \u2014 persistent connection to cloud broker<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#0f766e\">1<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">TCP Server<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">HTTP server \u2014 local configuration \/ dashboard<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#0f766e\">2<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">TCP Server<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Modbus\/TCP \u2014 industrial PLC communication on port 502<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#0f766e\">3<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">UDP<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">SNTP \u2014 periodic time synchronization<\/td>\n      <\/tr>\n      <tr style=\"background:#f0fdfa\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#0f766e\">4<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">UDP<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">DNS \u2014 hostname resolution for broker reconnect<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#6b7280\">5\u20137<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Reserved<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">OTA update, SNMP, or additional sensors<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<p>All six sessions above run concurrently. The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a> Ethernet Controller IC handles all TCP state machines, retransmissions, and ARP resolution autonomously. The host MCU only processes application data.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Target application environments where W5500 wired Ethernet outperforms Wi-Fi:<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Factory floor sensor nodes in an environment where 2.4 GHz RF is congested by motor drive and welding equipment.<\/li>\n\n\n\n<li>Building automation controllers that require 24\/7 uptime and need to avoid RF association failures.<\/li>\n\n\n\n<li>Medical monitoring equipment that is subject to wireless frequency restrictions.<\/li>\n\n\n\n<li>PLC to Cloud Gateways in Industrial Automation where network determinism is a compliance requirement.<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>MQTT over TCP with W5500 Ethernet Controller IC<\/strong><\/h3>\n\n\n\n<p>The MQTT protocol is currently dominant in the application layer of IoT networks, fitting very well into the TCP socket model of the W5500 Ethernet Controller IC. When an MCU is integrated with the W5500, sensor readings can be sent, control commands received, dashboard information updated, data logged, and automation devices controlled over a reliable wired Ethernet network.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>How MQTT maps to the W5500 socket model:<\/strong><\/h4>\n\n\n\n<p>MQTT requires a persistent TCP connection between the client (the embedded device) and the broker (cloud server). On the W5500, this maps to a single socket configured in TCP client mode. The application layer sends and receives raw byte payloads; the <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500 <\/a>Ethernet Controller IC handles all TCP framing, ACK, and retransmission transparently.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Socket configuration for MQTT:<\/strong><\/h4>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ Socket 0 \u2014 TCP Client mode for MQTT\n\nw5500_write_byte(Sn_MR, BSB_S0_REG, 0x01);\u00a0 \u00a0 \/\/ Sn_MR = TCP mode\n\n\/\/ Write broker IP to Sn_DIPR (e.g., 192.168.1.200)\n\nuint8_t broker_ip&#x5B;4] = {192, 168, 1, 200};\n\nw5500_write_burst(Sn_DIPR, BSB_S0_REG, broker_ip, 4);\n\n\/\/ Write broker port to Sn_DPORT\n\n\/\/ Port 1883 = 0x075B (unencrypted MQTT)\n\n\/\/ Port 8883 = 0x22B3 (MQTT over TLS \u2014 requires application-layer TLS)\n\nw5500_write_byte(Sn_DPORT, \u00a0 BSB_S0_REG, 0x07);\u00a0 \/\/ High byte\n\nw5500_write_byte(Sn_DPORT+1, BSB_S0_REG, 0x5B);\u00a0 \/\/ Low byte: port 1883\n\n\/\/ Open socket then issue CONNECT command\n\nw5500_write_byte(Sn_CR, BSB_S0_REG, 0x01);\u00a0 \u00a0 \/\/ OPEN\n\n\/\/ Wait for Sn_SR = 0x13 (SOCK_INIT)\n\nw5500_write_byte(Sn_CR, BSB_S0_REG, 0x04);\u00a0 \u00a0 \/\/ CONNECT\n\n\/\/ Wait for Sn_SR = 0x17 (SOCK_ESTABLISHED)\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>MQTT CONNECT packet \u2014 minimum fixed-header structure:<\/strong><\/h4>\n\n\n\n<p>Once the TCP connection is established (Sn_SR = 0x17), the application must send the MQTT CONNECT control packet to the broker. The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a> Ethernet Controller IC is transparent to this \u2014 it delivers whatever bytes the host writes into the TX buffer.<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ Minimal MQTT CONNECT packet (MQTT v3.1.1, clean session, no auth)\n\nuint8_t mqtt_connect&#x5B;] = {\n\n\u00a0\u00a0\u00a0\u00a00x10, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Fixed header: CONNECT packet type\n\n\u00a0\u00a0\u00a0\u00a00x12, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Remaining length = 18 bytes\n\n\u00a0\u00a0\u00a0\u00a00x00, 0x04, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Protocol name length\n\n\u00a0\u00a0\u00a0\u00a0'M','Q','T','T',\u00a0 \u00a0 \u00a0 \u00a0 \/\/ Protocol name\n\n\u00a0\u00a0\u00a0\u00a00x04, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Protocol level = 4 (MQTT 3.1.1)\n\n\u00a0\u00a0\u00a0\u00a00x02, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Connect flags: Clean session\n\n\u00a0\u00a0\u00a0\u00a00x00, 0x3C, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Keep-alive: 60 seconds\n\n\u00a0\u00a0\u00a0\u00a00x00, 0x08, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \/\/ Client ID length\n\n\u00a0\u00a0\u00a0\u00a0'W','5','5','0','0','-','0','1'\u00a0 \/\/ Client ID (8 chars)\n\n};\n\n\/\/ Write to Socket 0 TX buffer and send\n\nw5500_send(SOCKET_0, mqtt_connect, sizeof(mqtt_connect));\n<\/pre><\/div>\n\n\n<p><strong>Keep-alive responsibility:<\/strong> The W5500 Ethernet Controller IC does not manage MQTT keep-alive automatically. The host firmware must send an MQTT PINGREQ packet every keep_alive interval (60 seconds in the example above) and verify receipt of PINGRESP. If the broker closes the connection due to a missed keep-alive, the firmware must detect Sn_SR transitioning from 0x17 to 0x1C (CLOSE_WAIT) and re-execute the full TCP CONNECT + MQTT CONNECT sequence.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Using WIZnet ioLibrary_Driver for MQTT:<\/strong><\/h4>\n\n\n\n<p>The WIZnet ioLibrary (Internet Offload Library) includes a complete MQTT client implementation<a href=\"https:\/\/www.aipcba.com\/datasheet\/pdf\/w5500-cm32224.html\"> <\/a>under the Internet\/MQTT\/ directory. This implementation wraps the Eclipse Paho MQTT packet library and provides MQTTConnect(), MQTTPublish(), and MQTTSubscribe() functions that handle packet construction internally. For production designs, the ioLibrary MQTT client is the recommended starting point \u2014 it has been validated against multiple brokers and handles edge cases (connection loss, QoS 1 acknowledgment retry) that a hand-written implementation frequently misses.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>MQTT QoS levels and their W5500 implications:<\/strong><\/h4>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:900px\">\n    <thead>\n      <tr style=\"background:#7c2d12;color:white\">\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #9a3412;width:25%\">QoS Level<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #9a3412;width:30%\">Guarantee<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #9a3412\">W5500 Socket Impact<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#fff7ed\">\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#c2410c\">QoS 0 \u2014 At most once<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">No acknowledgment<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Single PUBLISH \u2192 no additional socket traffic<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#c2410c\">QoS 1 \u2014 At least once<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">PUBACK required<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Additional RX buffer consumed; firmware must handle PUBACK<\/td>\n      <\/tr>\n      <tr style=\"background:#fff7ed\">\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#c2410c\">QoS 2 \u2014 Exactly once<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">4-message handshake<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Highest buffer consumption; only use where critical<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<p>For most IoT sensor telemetry (temperature, humidity, status), QoS 0 or QoS 1 is appropriate. QoS 2 is rarely justified given the overhead and is not typically used on resource-constrained embedded devices.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Industrial Protocols: Modbus\/TCP<\/strong><\/h3>\n\n\n\n<p>The most popular wire-based industrial protocol is Modbus\/TCP, which is supported by the W5500: not through a specific mode, but through its standard TCP socket infrastructure. The W5500 is transparent to the content of the Modbus protocol, simply passing through TCP payloads up to the application layer that needs to decode them.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>How Modbus\/TCP maps to the W5500 socket model:<\/strong><\/h4>\n\n\n\n<p>An embedded system with a Modbus\/TCP server uses a W5500 socket in TCP server mode, listening on port 502. TCP port 502 is reserved for listening for Modbus communications, and it is a requirement for a Modbus server to listen by default on this port. When a Modbus master device connects, the W5500 socket will change state from listening to established, and Modbus ADUs will be sent as raw TCP payload bytes.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Socket configuration for Modbus\/TCP server:<\/strong><\/h4>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ Socket 2 \u2014 TCP Server on port 502 for Modbus\/TCP\n\nw5500_write_byte(Sn_MR, BSB_S2_REG, 0x01); \u00a0 \u00a0 \u00a0 \/\/ TCP mode\n\n\/\/ Set source port to 502 (0x01F6)\n\nw5500_write_byte(Sn_PORT, \u00a0 BSB_S2_REG, 0x01); \u00a0 \/\/ High byte\n\nw5500_write_byte(Sn_PORT+1, BSB_S2_REG, 0xF6); \u00a0 \/\/ Low byte\n\nw5500_write_byte(Sn_CR, BSB_S2_REG, 0x01); \u00a0 \u00a0 \u00a0 \/\/ OPEN\n\n\/\/ Wait for Sn_SR = 0x13 (SOCK_INIT)\n\nw5500_write_byte(Sn_CR, BSB_S2_REG, 0x02); \u00a0 \u00a0 \u00a0 \/\/ LISTEN\n\n\/\/ Wait for Sn_SR = 0x14 (SOCK_LISTEN) then 0x17 (SOCK_ESTABLISHED)\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>MBAP Header structure \u2014 what the application layer must parse:<\/strong><\/h4>\n\n\n\n<p>All Modbus\/TCP Application Data Units are transmitted using the TCP protocol with a registered port 502, with all fields encoded in big-endian format. A specific header is used for MBAP (Modbus Application Protocol); it is used to identify the Modbus Application Data Unit. This is where differences exist with the Modbus RTU protocol for serial line interfaces, where the Modbus slave address is replaced by a Unit Identifier within the MBAP header.<\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:900px\">\n    <thead>\n      <tr style=\"background:#1e40af;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #1e3a8a;width:18%\">Byte Offset<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #1e3a8a;width:18%\">Field<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #1e3a8a;width:18%\">Length<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #1e3a8a\">Value \/ Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#1d4ed8\">0\u20131<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Transaction Identifier<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Set by master; echoed back in response for request-response matching<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#1d4ed8\">2\u20133<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Protocol Identifier<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Always 0x0000 for Modbus<\/td>\n      <\/tr>\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#1d4ed8\">4\u20135<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Length<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">2 bytes<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Byte count of fields that follow (Unit ID + PDU)<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#1d4ed8\">6<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Unit Identifier<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">1 byte<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">0x01\u20130xF7 for serial gateway routing; 0xFF for direct TCP device<\/td>\n      <\/tr>\n      <tr style=\"background:#eff6ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#1d4ed8\">7+<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">PDU (Function Code + Data)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">N bytes<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Standard Modbus function code and register data<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Application layer parsing flow on the W5500 embedded server:<\/strong><\/h4>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ After Sn_SR = 0x17 (connection established), read incoming data\n\nuint16_t rx_size = w5500_read_rx_size(SOCKET_2);\n\nif (rx_size &gt;= 7) {\u00a0 \/\/ Minimum: 7-byte MBAP header\n\n\u00a0\u00a0\u00a0\u00a0uint8_t mbap&#x5B;7];\n\n\u00a0\u00a0\u00a0\u00a0w5500_recv(SOCKET_2, mbap, 7);\n\n\u00a0\u00a0\u00a0\u00a0uint16_t protocol_id = (mbap&#x5B;2] &lt;&lt; 8) | mbap&#x5B;3];\n\n\u00a0\u00a0\u00a0\u00a0uint16_t pdu_length\u00a0 = ((mbap&#x5B;4] &lt;&lt; 8) | mbap&#x5B;5]) - 1; \/\/ subtract Unit ID byte\n\n\u00a0\u00a0\u00a0\u00a0uint8_t\u00a0 unit_id \u00a0 \u00a0 = mbap&#x5B;6];\n\n\u00a0\u00a0\u00a0\u00a0if (protocol_id != 0x0000) return;\u00a0 \/\/ Discard non-Modbus frames\n\n\u00a0\u00a0\u00a0\u00a0uint8_t pdu&#x5B;256];\n\n\u00a0\u00a0\u00a0\u00a0w5500_recv(SOCKET_2, pdu, pdu_length);\u00a0 \/\/ Read PDU: &#x5B;Function Code]&#x5B;Data]\n\n\u00a0\u00a0\u00a0\u00a0\/\/ Process function code, build response, echo Transaction ID in response MBAP\n\n\u00a0\u00a0\u00a0\u00a0modbus_process_request(mbap, pdu, pdu_length);\n\n}\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>W5500 multi-socket advantage in combined MQTT + Modbus\/TCP designs:<\/strong><\/h4>\n\n\n\n<p>In real-world IoT gateways, it is often necessary for the device to concurrently support both MQTT (for cloud telemetry) and Modbus\/TCP (for local PLC communications). The firmware of the W5500 module is capable of supporting both MQTT and Modbus\/TCP concurrently by opening two sockets, one for each protocol, and then using each socket independently without interference with each other, as each socket has its own register set and memory space for its own buffers. Socket 0 maintains a continuous connection with the MQTT broker, and Socket 2 is listening on port 502 for a Modbus master connection, both of these operations occurring concurrently without any firmware-level arbitration being necessary.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"w5500_with_arduino_microcontrollers\"><\/span><strong>W5500 with Arduino &amp; Microcontrollers<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>With its SPI-only host interface, the W5500 works with virtually any microcontroller such as Arduino, <a href=\"https:\/\/www.flywing-tech.com\/search\/STM32\">STM32<\/a>, <a href=\"https:\/\/www.flywing-tech.com\/search\/ESP32\">ESP32<\/a>, RP2040, etc. This section provides an overview of the two most common implementations of the W5500: using the Ethernet library on an Arduino and using MicroPython on a Raspberry Pi Pico. Since both implementations use the same basic hardware wiring, they will also have the same basic wiring connections.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Hardware Wiring \u2014 Arduino Uno &amp; W5500<\/strong><\/h3>\n\n\n\n<p>The most critical constraint: the W5500 operates at 3.3V with 5V I\/O signal tolerance on its SPI and digital pins.<a href=\"https:\/\/jlcpcb.com\/partdetail\/Wiznet-W5500\/C32843\"> <\/a>This means the W5500 VCC supply must be 3.3V \u2014 use an LDO regulator (e.g., <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/pmic-voltage-regulators-linear-advanced-monolithic-systems-ams1117-3-3-0e8d6ea6\">AMS1117<\/a>-3.3) if your Arduino board only provides 5V \u2014 but you can connect SPI signals directly from a 5V Arduino without level shifting.<\/p>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:800px\">\n    <thead>\n      <tr style=\"background:#6b21a8;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #5b21b6;width:25%\">Arduino Uno Pin<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #5b21b6;width:20%\">W5500 Pin<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #5b21b6\">Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">3.3V (via LDO)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">VCC<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Must be 3.3V. Do not connect 5V to VCC.<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">GND<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">GND<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Common ground<\/td>\n      <\/tr>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">Pin 10<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SCSn<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Chip select \u2014 active LOW during transaction<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">Pin 11 (MOSI)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">MOSI<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Direct connect \u2014 5V signal tolerated<\/td>\n      <\/tr>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">Pin 12 (MISO)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">MISO<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Direct connect \u2014 W5500 outputs 3.3V logic<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#7c3aed\">Pin 13 (SCK)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SCLK<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Direct connect \u2014 5V signal tolerated<\/td>\n      <\/tr>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#6b7280\">Pin 2 (optional)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">INTn<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Interrupt-driven receive \u2014 recommended for production<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#6b7280\">Pin 9 (optional)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">RSTn<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Software-controlled reset<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<p><strong>Arduino Mega SPI pins:<\/strong> MOSI = 51, MISO = 50, SCK = 52. The SS pin (53) must be kept as OUTPUT even if not used as W5500 CS \u2014 failing to do so disables the SPI peripheral.<\/p>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"800\" height=\"450\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500-Ethernet-Controller-IC-10.png\" alt=\"Arduino Uno to W5500 wiring diagram showing SPI connections\" class=\"wp-image-8019\" \/><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Arduino Library &amp; HTTP GET Example<\/strong><\/h3>\n\n\n\n<p>The Arduino Ethernet library v2 auto-detects W5100, W5200, and W5500 hardware, and Ethernet.init(pin) allows use of any digital pin for the CS signal.<a href=\"https:\/\/www.aipcba.com\/datasheet\/pdf\/w5500-cm32224.html\"> <\/a>No manual chip selection or registry edits are required \u2014 the library reads the VERSIONR register at startup and configures itself accordingly.<\/p>\n\n\n\n<p><strong>Library installation:<\/strong> Arduino IDE \u2192 Library Manager \u2192 search &#8220;Ethernet&#8221; \u2192 install &#8220;Ethernet by Arduino&#8221;. Version 2.0.0 or later is required for W5500 support.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Full Arduino sketch \u2014 DHCP + HTTP GET:<\/strong><\/h4>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n#include &lt;SPI.h&gt;\n\n#include &lt;Ethernet.h&gt;\n\n\/\/ W5500 unique MAC address (change per device)\n\nbyte mac&#x5B;] = { 0x00, 0x08, 0xDC, 0x01, 0x02, 0x03 };\n\nEthernetClient client;\n\nconst char server&#x5B;] = &quot;example.com&quot;;\n\nvoid setup() {\n\n\u00a0\u00a0Serial.begin(115200);\n\n\u00a0\u00a0\/\/ Set CS pin BEFORE Ethernet.begin()\n\n\u00a0\u00a0Ethernet.init(10);\u00a0 \/\/ Pin 10 = SCSn on Arduino Uno\n\n\u00a0\u00a0\/\/ Acquire IP via DHCP (returns 0 on failure)\n\n\u00a0\u00a0if (Ethernet.begin(mac) == 0) {\n\n\u00a0\u00a0\u00a0\u00a0Serial.println(&quot;DHCP failed \u2014 check cable and W5500 power&quot;);\n\n\u00a0\u00a0\u00a0\u00a0while (true);\n\n\u00a0\u00a0}\n\n\u00a0\u00a0\/\/ Verify hardware detected: W5500 linkStatus\n\n\u00a0\u00a0if (Ethernet.linkStatus() == LinkOFF) {\n\n\u00a0\u00a0\u00a0\u00a0Serial.println(&quot;No Ethernet link \u2014 check RJ45 cable&quot;);\n\n\u00a0\u00a0}\n\n\u00a0\u00a0Serial.print(&quot;IP address: &quot;);\n\n\u00a0\u00a0Serial.println(Ethernet.localIP());\n\n\u00a0\u00a0delay(1000);\u00a0 \/\/ Allow W5500 to stabilize after DHCP\n\n\u00a0\u00a0\/\/ Open TCP connection and send HTTP GET\n\n\u00a0\u00a0if (client.connect(server, 80)) {\n\n\u00a0\u00a0\u00a0\u00a0client.println(&quot;GET \/ HTTP\/1.1&quot;);\n\n\u00a0\u00a0\u00a0\u00a0client.print(&quot;Host: &quot;);\n\n\u00a0\u00a0\u00a0\u00a0client.println(server);\n\n\u00a0\u00a0\u00a0\u00a0client.println(&quot;Connection: close&quot;);\n\n\u00a0\u00a0\u00a0\u00a0client.println();\n\n\u00a0\u00a0} else {\n\n\u00a0\u00a0\u00a0\u00a0Serial.println(&quot;TCP connection failed&quot;);\n\n\u00a0\u00a0}\n\n}\n\nvoid loop() {\n\n\u00a0\u00a0\/\/ Stream response bytes to Serial\n\n\u00a0\u00a0while (client.available()) {\n\n\u00a0\u00a0\u00a0\u00a0Serial.write(client.read());\n\n\u00a0\u00a0}\n\n\u00a0\u00a0if (!client.connected()) {\n\n\u00a0\u00a0\u00a0\u00a0client.stop();\n\n\u00a0\u00a0\u00a0\u00a0while (true);\u00a0 \/\/ Halt after single request\n\n\u00a0\u00a0}\n\n}\n<\/pre><\/div>\n\n\n<h3 class=\"wp-block-heading\"><strong>W5500 with Raspberry Pi Pico &amp; MicroPython<\/strong><\/h3>\n\n\n\n<p>MicroPython&#8217;s official network.<a href=\"https:\/\/github.com\/adafruit\/Adafruit_CircuitPython_Wiznet5k\">WIZNET5K<\/a> driver supports the W5500 on RP2040 boards. The network.WIZNET5K(spi, pin_cs, pin_rst) constructor initialises the W5500 module using the given SPI bus and pins; all objects are initialised by the driver internally.<a href=\"https:\/\/cdn.sparkfun.com\/datasheets\/Dev\/Arduino\/Shields\/W5500_datasheet_v1.0.2_1.pdf\">&nbsp;<\/a><\/p>\n\n\n\n<p><strong>Firmware requirement:<\/strong> Use the official WIZnet MicroPython build for the W5500-EVB-Pico, available at micropython.org\/download\/?vendor=Wiznet. The standard Pico firmware does not include the WIZNET5K driver by default.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Pico \u2194 W5500 SPI pin mapping (W5500-EVB-Pico default):<\/strong><\/h4>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:800px\">\n    <thead>\n      <tr style=\"background:#047857;color:white\">\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #065f46;width:25%\">RP2040 GPIO<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #065f46;width:20%\">W5500 Pin<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #065f46;width:25%\">SPI Role<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #065f46\">Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#047857\">GP18<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SCLK<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SPI0 SCK<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">SPI Clock<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#047857\">GP19<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">MOSI<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SPI0 TX<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Master Out Slave In<\/td>\n      <\/tr>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#047857\">GP16<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">MISO<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SPI0 RX<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Master In Slave Out<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#047857\">GP17<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SCSn<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Chip Select<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Active LOW during SPI transaction<\/td>\n      <\/tr>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;text-align:center;font-weight:600;border-bottom:1px solid #e5e7eb;color:#047857\">GP20<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">RSTn<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Hardware Reset<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Optional \u2014 connect for hardware reset control<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Complete MicroPython snippet \u2014 DHCP + TCP client:<\/strong><\/h4>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: python; title: ; notranslate\" title=\"\">\nimport network\n\nimport socket\n\nimport time\n\nfrom machine import Pin, SPI\n\n# --- W5500 SPI + network init ---\n\nspi = SPI(0, 2_000_000, \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 # Start at 2 MHz for init stability\n\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0mosi=Pin(19),\n\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0miso=Pin(16),\n\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0sck=Pin(18))\n\nnic = network.WIZNET5K(spi, Pin(17), Pin(20))\u00a0 # spi, CS, RST\n\nnic.active(True)\n\nnic.ifconfig('dhcp')\u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 \u00a0 # Acquire IP via DHCP\n\n# Wait for DHCP assignment (timeout after 15s)\n\ntimeout = 15\n\nwhile nic.ifconfig()&#x5B;0] == '0.0.0.0':\n\n\u00a0\u00a0\u00a0\u00a0timeout -= 1\n\n\u00a0\u00a0\u00a0\u00a0if timeout == 0:\n\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0raise RuntimeError(&quot;DHCP timeout \u2014 check cable\/switch&quot;)\n\n\u00a0\u00a0\u00a0\u00a0time.sleep(1)\n\nprint(&quot;IP:&quot;, nic.ifconfig()&#x5B;0]) \u00a0 # Print assigned IP\n\n# --- TCP socket connect and HTTP GET ---\n\naddr = socket.getaddrinfo(&quot;example.com&quot;, 80)&#x5B;0]&#x5B;-1]\n\ns = socket.socket()\n\ns.connect(addr)\n\ns.send(b&quot;GET \/ HTTP\/1.1\\r\\nHost: example.com\\r\\nConnection: close\\r\\n\\r\\n&quot;)\n\n# Read and print response\n\nwhile True:\n\n\u00a0\u00a0\u00a0\u00a0data = s.recv(512)\n\n\u00a0\u00a0\u00a0\u00a0if not data:\n\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0break\n\n\u00a0\u00a0\u00a0\u00a0print(data.decode(), end=&quot;&quot;)\n\ns.close()\n<\/pre><\/div>\n\n\n<p><strong>Static IP alternative<\/strong> \u2014 replace nic.ifconfig(&#8216;dhcp&#8217;) with:<\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: python; title: ; notranslate\" title=\"\">\nnic.ifconfig(('192.168.1.100', '255.255.255.0', '192.168.1.1', '8.8.8.8'))\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>Key implementation notes:<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>SPI clock can be increased to 40 MHz (40_000_000) after DHCP is confirmed stable. Start at 2 MHz during debugging<\/li>\n\n\n\n<li>nic.ifconfig()[0] returns &#8216;0.0.0.0&#8217; while DHCP is pending<a href=\"https:\/\/docs.wiznet.io\/Product\/Chip\/Ethernet\/W5500\/W5500-EVB\"> <\/a>\u2014 always poll for a valid IP before opening sockets<\/li>\n\n\n\n<li>network.WIZNET5K exposes the standard MicroPython BSD socket API \u2014 the same socket.socket(), s.connect(), s.send(), s.recv() calls used for Wi-Fi work identically over W5500 wired Ethernet<\/li>\n\n\n\n<li>For ESP32 with W5500: use the ESP32-Wiznet-W5500-Micropython library \u2014 initialize with machine.SPI on any available SPI bus and assign CS\/RST GPIO pins accordingly<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>MCU Compatibility Quick Reference<\/strong><\/h3>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0c121d;color: #e5e7eb;font-size: 15px;border-radius: 10px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #6366f1, #4f46e5)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #4338ca;font-weight: 600;color: white\">MCU \/ Platform<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #4338ca;font-weight: 600;color: white\">Library \/ Driver<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #4338ca;font-weight: 600;color: white\">SPI Max Clock<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #4338ca;font-weight: 600;color: white\">Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #a5b4fc;font-weight: 500\">Arduino Uno (ATmega328P)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Arduino Ethernet v2<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">8 MHz<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">5V SPI direct \u2014 no level shift needed<\/td>\n      <\/tr>\n      <tr style=\"background: #0c121d\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #a5b4fc;font-weight: 500\">Arduino Mega (ATmega2560)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Arduino Ethernet v2<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">8 MHz<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">MOSI=51, MISO=50, SCK=52<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #a5b4fc;font-weight: 500\">Arduino Due (ARM Cortex-M3)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Arduino Ethernet v2<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">42 MHz<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">3.3V native \u2014 no LDO needed<\/td>\n      <\/tr>\n      <tr style=\"background: #0c121d\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #a5b4fc;font-weight: 500\">ESP32<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Arduino Ethernet v2 \/ MicroPython<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">40 MHz<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">SPI bus pins configurable via Ethernet.init()<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #a5b4fc;font-weight: 500\">STM32F4<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Ethernet_STM32<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">42 MHz<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Multi-SPI bus support; declare SPIClass object<\/td>\n      <\/tr>\n      <tr style=\"background: #0c121d\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #a5b4fc;font-weight: 500\">Raspberry Pi Pico (RP2040)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">MicroPython WIZNET5K<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">40 MHz<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Use WIZnet MicroPython firmware build<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;color: #a5b4fc;font-weight: 500\">Bare-metal C (any MCU)<\/td>\n        <td style=\"padding: 16px 20px\">WIZnet ioLibrary_Driver<\/td>\n        <td style=\"padding: 16px 20px\">Up to 80 MHz<\/td>\n        <td style=\"padding: 16px 20px\">MCU-independent; port SPI_Write()\/SPI_Read()<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"w5500_vs_w5100_vs_w5100s_%e2%80%94_technical_comparison\"><\/span><strong>W5500 vs W5100 vs W5100S \u2014 Technical Comparison<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The decision of engineers who are considering a WIZnet Ethernet controller IC for a new project is mostly based on one question: &#8220;<a href=\"https:\/\/www.flywing-tech.com\/product-detail\/rf-antennas-pulselarsen-antennas-w5100-76c971b5\">W5100<\/a>, <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5100s-l-b0d5458a\">W5100S<\/a>, or <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a>?&#8221; The decision is based only on the number of sockets required, SPI throughput, PCB footprint, and compatibility of existing firmware. This section is intended to provide a direct, verified comparison of all these ICs, allowing a decision based on facts instead of assumptions.<\/p>\n\n\n\n<p><strong>Two corrections from commonly circulated comparison tables:<\/strong> The W5100S SPI speed is 70 MHz \u2014 not 14 MHz (that figure applies to the original W5100 only). The W5100S allows the SPI clock to work at a maximum of 70 MHz. The W5100S will be offered in 48-pin LQFP and QFN packages vs. 80-pin for the W5100. Additionally, it has already been established in Section 2 that the W5500 has a package of LQFP48 and not QFN48. These mistakes are rampant in the documents that have been created and should not appear in published technical materials.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Side-by-Side Specification Table<\/strong><\/h3>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:800px\">\n    <thead>\n      <tr style=\"background:#b45309;color:white\">\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #92400e;width:28%\">MCU \/ Platform<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #92400e;width:22%\">Library \/ Driver<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #92400e;width:18%\">SPI Max Clock<\/th>\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #92400e\">Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#fffbeb\">\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#b45309\">Arduino Uno (ATmega328P)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Arduino Ethernet v2<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">8 MHz<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">5V SPI direct \u2014 no level shift needed<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#b45309\">Arduino Mega (ATmega2560)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Arduino Ethernet v2<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">8 MHz<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">MOSI=51, MISO=50, SCK=52<\/td>\n      <\/tr>\n      <tr style=\"background:#fffbeb\">\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#b45309\">Arduino Due (ARM Cortex-M3)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Arduino Ethernet v2<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">42 MHz<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">3.3V native \u2014 no LDO needed<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#b45309\">ESP32<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Arduino Ethernet v2 \/ MicroPython<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">40 MHz<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">SPI bus pins configurable via Ethernet.init()<\/td>\n      <\/tr>\n      <tr style=\"background:#fffbeb\">\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#b45309\">STM32F4<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Ethernet_STM32<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">42 MHz<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Multi-SPI bus support; declare SPIClass object<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#b45309\">Raspberry Pi Pico (RP2040)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">MicroPython WIZNET5K<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">40 MHz<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">Use WIZnet MicroPython firmware build<\/td>\n      <\/tr>\n      <tr style=\"background:#fffbeb\">\n        <td style=\"padding:11px 14px;font-weight:600;border-bottom:1px solid #e5e7eb;color:#b45309\">Bare-metal C (any MCU)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">WIZnet ioLibrary_Driver<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">Up to 80 MHz<\/td>\n        <td style=\"padding:11px 14px;border-bottom:1px solid #e5e7eb\">MCU-independent; port SPI_Write()\/SPI_Read()<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Key Differences Explained<\/strong><\/h3>\n\n\n\n<p><strong>Socket count is the most consequential difference.<\/strong> The maximum number of connections for both W5100 and W5100 is limited to four sockets. A single application using both MQTT + HTTP server + DNS + SNTP occupies all four of the sockets. The W5500, on the other hand, with a total of eight sockets provides a wider range of possible concurrent protocol stacks. This includes the possibility of adding Modbus\/TCP, support for over-the-air (OTA) updates, or monitoring using SNMP without exhausting these sockets.<\/p>\n\n\n\n<p><strong>SPI speed gap is real but context-dependent.<\/strong> The 14 MHz SPI limitation on the original W5100 causes a restriction on the maximum burst TCP payload throughput the original W5100 can support. The W5100S increases the maximum burst TCP payload throughput to 70 MHz, but does not have the W5500&#8217;s VDM burst mode, which allows an entire 1460 byte TCP segment to be transmitted using a single SCSn assertion. <\/p>\n\n\n\n<p><strong>Package footprint changed significantly.<\/strong> The original W5100 is housed in an LQFP80 package with a large 10 \u00d7 10 mm footprint accounting for low density consumer electronics application PCB area. The W5100S has reduced the PCB footprint to a 48 pin LQFP or QFN with a 7 \u00d7 7 mm footprint that is identical to the W5500 making the board-to-board migration from W5100S to W5500 only a schematic edit without a need for layout changes.<\/p>\n\n\n\n<p><strong>Firmware compatibility: W5100 \u2192 W5100S is a drop-in.<\/strong> Firmware written for the W5100 is compatible with W5100S hardware without modification, making the W5100S the correct upgrade path for any existing W5100-based product in production. Migrating to W5500 requires rewriting register access code to use the W5500&#8217;s BSB-based 3-phase SPI frame format \u2014 not a complex change, but not transparent.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Decision Guide \u2014 Which IC to Use<\/strong><\/h3>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0f172a;color: #e2e8f0;font-size: 15px;border-radius: 12px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #6366f1, #8b5cf6)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #4f46e5;font-weight: 600;color: white\">Scenario<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #4f46e5;font-weight: 600;color: white\">Recommended IC<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #4f46e5;font-weight: 600;color: white\">Reason<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">New IoT design, any socket count<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #a5b4fc;font-weight: 500\">W5500<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">8 sockets, 80 MHz SPI, burst mode, smallest LQFP48 \u2014 best all-round spec<\/td>\n      <\/tr>\n      <tr style=\"background: #172033\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Existing W5100 product needing upgrade<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #c084fc;font-weight: 500\">W5100S<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Firmware-compatible drop-in; smaller package; adds WOL and Mode 3 SPI<\/td>\n      <\/tr>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Ultra-low-cost single-socket design<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #fca5a5;font-weight: 500\">W5100S<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Cheaper than W5500 at volume; 4 sockets sufficient for simple applications<\/td>\n      <\/tr>\n      <tr style=\"background: #172033\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">High-throughput TCP (e.g., file transfer, streaming)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #7dd3fc;font-weight: 500\">W5500<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Burst SPI + 32 KB buffer + 80 MHz = only viable WIZnet option<\/td>\n      <\/tr>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Industrial multi-protocol (MQTT + Modbus + HTTP)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #a5b4fc;font-weight: 500\">W5500<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">6+ concurrent sockets required; W5100\/W5100S insufficient<\/td>\n      <\/tr>\n      <tr style=\"background: #172033\">\n        <td style=\"padding: 16px 20px\">Arduino legacy shield compatibility<\/td>\n        <td style=\"padding: 16px 20px;color: #fde68a;font-weight: 500\">W5100 \/ W5500<\/td>\n        <td style=\"padding: 16px 20px\">W5100 = original shield chip; W5500 = Arduino Ethernet Shield 2 chip<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Migration Path: W5100 \u2192 W5500<\/strong><\/h3>\n\n\n\n<p>Migrating a W5100-based design to W5500 involves three areas of change:<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Hardware changes:<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Replace LQFP80 footprint with LQFP48 \u2014 requires PCB layout revision<\/li>\n\n\n\n<li>W5500 requires EXRES1 (12.4 k\u03a9), TOCAP (4.7 \u00b5F), and 1V2O (10 nF) passive components not present on W5100 designs <\/li>\n\n\n\n<li>Crystal circuit remains identical (25 MHz)<\/li>\n\n\n\n<li>SPI connections are pin-for-pin compatible in function; only physical pin numbers change<\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Firmware changes:<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>All SPI transactions must be updated to use W5500&#8217;s 3-phase frame format (Address + Control + Data with BSB field).<\/li>\n\n\n\n<li>W5100-style direct 16-bit address writes are not valid on W5500<\/li>\n\n\n\n<li>Socket register offsets are the same; the BSB field in the control byte is the new element<\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Library changes (Arduino):<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>The W5500 is the exact chip used in the Arduino Ethernet Shield 2 and is natively supported by the built-in Arduino Ethernet library<a href=\"https:\/\/lcsc.com\/product-detail\/Ethernet-ICs_WIZNET-W5500_C32843.html\"> <\/a>&nbsp;\u2014 no custom library needed, unlike the W5100S which requires a modified detection routine<\/li>\n\n\n\n<li>Change: Ethernet.init(CS_PIN) before Ethernet.begin() \u2014 same call works for both W5100 and W5500 in Ethernet v2<\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"w5500_pcb_layout_hardware_design_guidelines\"><\/span><strong>W5500 PCB Layout &amp; Hardware Design Guidelines<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>A correctly functioning W5500 design on a bench will fail in production if the PCB layout violates the physical requirements of the analog PHY section. The majority of hardware failures in W5500 designs are due to the following three layout locations; Power supply decoupling, Crystal circuit and Ethernet magnetics. All three of these locations must follow very specific and non-negotiable layout rules. The following section will describe the required layouts with exact values and references taken from WIZnet Design Guide and <a href=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500_ds_v110e.pdf\">Datasheet v1.1.0.<\/a><\/p>\n\n\n\n<p><strong>Package correction:<\/strong> The W5500 is housed in an <strong>LQFP48<\/strong> package, not QFN48. There is no exposed thermal pad on the bottom of the package \u2014 thermal pad guidelines that appear in other articles are incorrect for the W5500 and apply to different ICs. Decoupling strategy is the primary thermal and noise management tool for this chip.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Power Supply Decoupling<\/strong><\/h3>\n\n\n\n<p>The most common cause of unstable PHY behavior, SPI corruption at high clock rates and sporadic link failure that are challenging to replicate are due to power supply noise. The W5500 has a digital VDD and several analog AVDD pins that power the integrated PHY. These must be decoupled independently and routed with&nbsp; discipline.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Decoupling architecture \u2014 three layers:<\/strong><\/h3>\n\n\n\n<p>To minimize power supply noise, place a 0.1 uF bypass capacitor close as possible to each input pin of every power pin. In addition to the bypass capacitor, you will also need to place two bulk capacitors (10 uF and 4.7 uF), and then you can connect power through either a Ferrite Bead or 0 Ohm resistor to provide a filtering function for the power and to reduce noise on the power supply.<\/p>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0f1e2e;color: #e0f2f1;font-size: 15px;border-radius: 12px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #0d9488, #2dd4bf)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #0f766e;font-weight: 600;color: white\">Layer<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #0f766e;font-weight: 600;color: white\">Component<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #0f766e;font-weight: 600;color: white\">Placement<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #0f766e;font-weight: 600;color: white\">Purpose<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #13294b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f;color: #a7f3d0;font-weight: 500\">Per-pin bypass<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">100 nF ceramic (X5R or X7R, 0402)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">Within 1 mm of each VDD\/AVDD pin<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">Suppresses high-frequency switching noise at the pin<\/td>\n      <\/tr>\n      <tr style=\"background: #0f1e2e\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f;color: #a7f3d0;font-weight: 500\">Bulk local<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">10 \u00b5F electrolytic or ceramic<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">Near the W5500 power entry point<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">Handles mid-frequency transient current demand<\/td>\n      <\/tr>\n      <tr style=\"background: #13294b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f;color: #a7f3d0;font-weight: 500\">Power entry filter<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">Ferrite bead (e.g., BLM18AG102SN1)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">Between main 3.3V rail and W5500 supply<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1e3a5f\">Attenuates conducted noise from digital switching into analog domain<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Precise decoupling values per supply pin:<\/strong><\/h4>\n\n\n\n<p>The 0.1 \u00b5F decoupling capacitors should be placed as close as possible to each pin, one for each. The 1 \u00b5F capacitor should be placed on the initial power input line.<a href=\"https:\/\/shop.wiznet.eu\/w5500.html\">&nbsp;<\/a><\/p>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #111827;color: #f3f4f6;font-size: 15px;border-radius: 12px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #f59e0b, #d97706)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #b45309;font-weight: 600;color: white\">Supply Net<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #b45309;font-weight: 600;color: white\">Pins<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #b45309;font-weight: 600;color: white\">Required Decoupling<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #b45309;font-weight: 600;color: white\">Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #1f2937\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151;color: #fde68a;font-weight: 500\">VDD (digital)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Pin 28<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">100 nF + 10 \u00b5F<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Digital core supply<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151;color: #fde68a;font-weight: 500\">AVDD (analog PHY)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Pins 4, 8, 11, 15, 17, 21<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">100 nF per pin individually<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Each AVDD pin decoupled independently \u2014 do not share a single cap across two pins<\/td>\n      <\/tr>\n      <tr style=\"background: #1f2937\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151;color: #fde68a;font-weight: 500\">Internal regulator<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Pin 22 (1V2O)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">10 nF mandatory (see Section 2.3)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Internal 1.2V regulator output \u2014 do not connect to supply rail<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151;color: #fde68a;font-weight: 500\">Analog bias<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Pin 20 (TOCAP)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">4.7 \u00b5F mandatory<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #374151\">Stability-critical \u2014 keep trace &lt; 5 mm<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>AVDD vs VDD routing:<\/strong><\/h4>\n\n\n\n<p>It is recommended to distinguish between AGND and DGND. The analog GND pin and digital GND pin should be maintained in a good path.<a href=\"https:\/\/octopart.com\/w5500-wiznet-30858120\"> <\/a>In practice, this means:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Route the AVDD trace separately from VDD from the ferrite bead or power plane entry point to each AVDD pin cluster<\/li>\n\n\n\n<li>Do not share via connections between AVDD and VDD \u2014 each should have dedicated via drops to the power plane<\/li>\n\n\n\n<li>We recommend you not to separate analog and digital GND by a split plane. If there is enough GND space, it is better to integrate them into DGND rather than separate them by beads.<a href=\"https:\/\/octopart.com\/w5500-wiznet-30858120\"> <\/a>A unified, low-impedance GND plane is more effective than a split plane for most W5500 designs<\/li>\n<\/ul>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>PCB layout priority rules:<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Place decoupling capacitors on the same layer as the W5500 \u2014 do not route through vias to a capacitor on the opposite side<\/li>\n\n\n\n<li>Make sure to use many vias for good GND connectivity across layers.&nbsp; A minimum of two vias for each capacitor GND return path, four or more is better.&nbsp;<\/li>\n\n\n\n<li>It is recommended that GND copper fill be applied to the interior area of the chip footprint<a href=\"https:\/\/octopart.com\/datasheet\/wiznet\/W5500\"> <\/a>&nbsp;to reduce ground impedance directly under the IC<\/li>\n\n\n\n<li>RSTn power-on reset: it is safer to attach a 4.7 k\u03a9 pull-up resistor to the RSTn pin and a capacitor of at least 1 \u00b5F to GND. In cases where the device operates with power sources like PoE, this is not optional but essential.<a href=\"https:\/\/shop.wiznet.eu\/w5500.html\">&nbsp;<\/a><\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Crystal &amp; Clock Circuit<\/strong><\/h3>\n\n\n\n<p>The W5500 PHY requires a stable 25 MHz reference clock. An unstable or noisy clock will produce a PHY that fails to link, links intermittently, or shows elevated error rates under thermal or voltage stress.<\/p>\n\n\n\n<p><strong>Crystal selection:<\/strong><\/p>\n\n\n\n<p>A 25 MHz crystal or oscillator must be installed. When using a crystal, the load capacitance of the W5500 should be calculated and designed to be 18 pF.<a href=\"https:\/\/shop.wiznet.eu\/w5500.html\">&nbsp;<\/a><\/p>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0f172a;color: #e2e8f0;font-size: 15px;border-radius: 12px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #06b6d4, #0891b2)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #0e7490;font-weight: 600;color: white\">Parameter<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #0e7490;font-weight: 600;color: white\">Value<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #0e7490;font-weight: 600;color: white\">Notes<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #7dd3fc;font-weight: 500\">Frequency<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">25.000 MHz<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Fundamental mode only \u2014 do not use overtone crystals<\/td>\n      <\/tr>\n      <tr style=\"background: #0f172a\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #7dd3fc;font-weight: 500\">Load capacitance (CL)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">18 pF target<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Verify with individual crystal datasheet \u2014 ranges from 12\u201320 pF<\/td>\n      <\/tr>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #7dd3fc;font-weight: 500\">Frequency tolerance<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">\u00b120 ppm or better<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Tighter tolerance reduces PHY clock drift risk<\/td>\n      <\/tr>\n      <tr style=\"background: #0f172a\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #7dd3fc;font-weight: 500\">Frequency stability (temp)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">\u00b150 ppm over operating range<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">\u201340\u00b0C to +85\u00b0C for industrial range<\/td>\n      <\/tr>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;color: #7dd3fc;font-weight: 500\">ESR<\/td>\n        <td style=\"padding: 16px 20px\">&lt; 50 \u03a9<\/td>\n        <td style=\"padding: 16px 20px\">Higher ESR risks oscillation startup failure<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Load capacitor calculation:<\/strong><\/h4>\n\n\n\n<p>The two external load capacitors (C_XI and C_XO) are calculated from the crystal&#8217;s specified CL:<\/p>\n\n\n\n<p>$CL = (C_XI \u00d7 C_XO) \/ (C_XI + C_XO) + C_stray$<\/p>\n\n\n\n<p>$Where C_stray \u2248 3\u20135 pF (PCB trace + IC input capacitance)$<\/p>\n\n\n\n<p>$For CL = 18 pF and C_stray = 4 pF:$<\/p>\n\n\n\n<p>$(C \u00d7 C) \/ (2C) + 4 = 18$<\/p>\n\n\n\n<p>$C\/2 = 14 \u2192 C = 28 pF \u2192 $ use 27 pF standard value<\/p>\n\n\n\n<p>For a CL = 18 pF crystal with estimated 4 pF stray: use <strong>27 pF<\/strong> \u00b15% COG\/NPO ceramic capacitors on both XI and XO. Do not substitute $X5R\/X7R$ \u2014 their capacitance varies with voltage and temperature, degrading frequency accuracy.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>PCB layout rules for the crystal circuit:<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Place the oscillator as close to the chip as possible. Because it is a very high-frequency clock, route traces on the same layer as the chip without vias.<a href=\"https:\/\/lcsc.com\/product-detail\/Ethernet-ICs_WIZNET-W5500_C32843.html\">&nbsp;<\/a><\/li>\n\n\n\n<li>Keep all three crystal traces (XI, XO, common GND node) under 5 mm total length<\/li>\n\n\n\n<li>It is recommended that only one chip be connected to one oscillating element.<a href=\"https:\/\/octopart.com\/datasheet\/wiznet\/W5500\"> <\/a>Never share the 25 MHz crystal between the W5500 and another IC<\/li>\n\n\n\n<li>Surround the crystal circuit with a continuous GND guard ring connected to the GND plane through multiple vias \u2014 this prevents adjacent digital signals from coupling noise into the high-impedance crystal oscillator loop<\/li>\n\n\n\n<li>Do not route SPI, power, or LED traces beneath or beside the crystal circuit on any PCB layer<\/li>\n<\/ul>\n\n\n\n<p><strong>External clock option:<\/strong> A 25 MHz CMOS oscillator can be fed directly into pin 30 (XI\/CLKIN) if there are concerns about either board size or complexity of the crystal circuit. Apply a 3.3 V single-ended output to the oscillator and leave pin 31 (XO) unconnected and floating. In addition, a 3.3 V clock must be applied to the external clock input. If this method is used, do not connect XO or any other pin on the external clock source to anything else.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>RJ45 Magnetics &amp; Ethernet Transformer Circuit<\/strong><\/h3>\n\n\n\n<p>The Ethernet transformer connects the W5500 PHY pins to an RJ45 connector and allows for DC isolation (the IEEE 802.3 standard specifies an isolation requirement of 1500V RMS), common mode noise rejection, and proper impedance matching for these two connections. Although the transformer can be omitted from the design, this will increase the noise susceptibility of the overall design and degrade the performance of the Ethernet device.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>W5500 MDI signal mode difference from other PHY chips:<\/strong><\/h4>\n\n\n\n<p>Unlike traditional chips, the W5500 has separate RX and TX port levels. The TX and RX side of the W5500 is driven differently than the majority of chips in that the RX side is current driven and the TX side is voltage driven. To drive the RX side in current mode, the CT (center tap) must connect to GND via a capacitor. When driving the TX side in voltage mode, supply power to the CT.<\/p>\n\n\n\n<p>The above distinction also governs how the transformer center tap connections are later made, which is something that the majority of W5500 reference designs from other WIZnet based designs do not show properly.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Two transformer circuit configurations:<\/strong><\/h4>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Option A \u2014 Separate RJ45 + external transformer:<\/strong><\/h4>\n\n\n\n<p>Use an external 10\/100 Ethernet transformer (e.g., W\u00fcrth 749010014, Bothhand BH-MDT-1002NL) with a separate RJ45 connector.<\/p>\n\n\n\n<p>W5500 TXP\/TXN \u2192 49.9 \u03a9 series resistors \u2192 Transformer TX winding \u2192 RJ45 TD+ \/ TD\u2212<\/p>\n\n\n\n<p>W5500 RXP\/RXN \u2192 Transformer RX winding \u2192 RJ45 RD+ \/ RD\u2212<\/p>\n\n\n\n<p>TX center tap (TCT): Connect to 3.3V through 49.9 \u03a9 (Voltage Mode termination)<\/p>\n\n\n\n<p>RX center tap (RCT): Connect to GND through 0.1 \u00b5F capacitor (Current Mode isolation)<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Option B \u2014 Integrated RJ45 + magnetics module (recommended for new designs):<\/strong><\/h4>\n\n\n\n<p>The circuit may change depending on the internal circuit configuration of the Ethernet socket. Make sure to refer to the datasheet and design the circuit appropriately.<a href=\"https:\/\/docs.wiznet.io\/img\/products\/w5500\/w5500_ds_v109k.pdf\"> <\/a>Modules like the <strong>HR911105A<\/strong> integrate the transformer, common-mode choke, and LED indicators in a single package:<\/p>\n\n\n\n<p>W5500 TXP\/TXN \u2192 49.9 \u03a9 series resistors \u2192 HR911105A TX pins<\/p>\n\n\n\n<p>W5500 RXP\/RXN \u2192 0.1 \u00b5F capacitors \u2192 HR911105A RX pins<\/p>\n\n\n\n<p>HR911105A TCT \u2192 49.9 \u03a9 \u2192 3.3V<\/p>\n\n\n\n<p>HR911105A RCT \u2192 0.1 \u00b5F \u2192 GND<\/p>\n\n\n\n<p>If the RJ45 connector has RCT and TCT tied together internally, it is only necessary to install a capacitor on the RX line.<a href=\"https:\/\/lcsc.com\/product-detail\/Ethernet-ICs_WIZNET-W5500_C32843.html\"> <\/a>Always verify the specific RJ45 module datasheet \u2014 this differs between manufacturers.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Isolation zone layout rule:<\/strong><\/h4>\n\n\n\n<p>A block diagram should show how the RJ45 and PHY device connect, focusing on an isolation region and the ground (GND) connections. On the printed circuit board (PCB), a physical isolation boundary should be shown between the transformer secondary side (RJ45 side) and the transformer primary side (W5500 side). There should be no traces, copper pours, or GND fills that cross this boundary, except for the 1 nF\/200 V chassis coupling capacitor. This maintains the 1500 V isolation specified by IEEE 802.3.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>MDI differential trace routing:<\/strong><\/h4>\n\n\n\n<ul class=\"wp-block-list\">\n<li>Route TXP\/TXN and RXP\/RXN as 100 \u03a9 differential pairs<\/li>\n\n\n\n<li>Match trace lengths within \u00b10.5 mm for each differential pair<\/li>\n\n\n\n<li>Keep differential pair traces away from all digital signals, SPI lines, and power traces<\/li>\n\n\n\n<li>Do not use right-angle corners on differential pair routing \u2014 use 45\u00b0 bends or arcs<\/li>\n<\/ul>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Common PCB Design Mistakes &amp; How to Avoid Them<\/strong><\/h3>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0f0f1a;color: #f1f5f9;font-size: 15px;border-radius: 12px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #ec4899, #db2777)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #be185d;font-weight: 600;color: white\">Mistake<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #be185d;font-weight: 600;color: white\">Consequence<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #be185d;font-weight: 600;color: white\">Correct Practice<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #1e1b2e\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44;color: #f9a8d4;font-weight: 500\">Single 100 nF capacitor shared across two AVDD pins<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">PHY noise, intermittent link<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">One dedicated capacitor per AVDD pin<\/td>\n      <\/tr>\n      <tr style=\"background: #0f0f1a\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44;color: #f9a8d4;font-weight: 500\">EXRES1 using 12 k\u03a9 standard tolerance resistor<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Marginal PHY biasing; fails at temperature extremes<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">12.4 k\u03a9 \u00b11% precision resistor \u2014 no substitution<\/td>\n      <\/tr>\n      <tr style=\"background: #1e1b2e\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44;color: #f9a8d4;font-weight: 500\">Crystal load capacitors using X5R ceramic<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Frequency drift with voltage\/temperature<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">COG\/NPO dielectric only for crystal load caps<\/td>\n      <\/tr>\n      <tr style=\"background: #0f0f1a\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44;color: #f9a8d4;font-weight: 500\">Crystal traces longer than 10 mm or crossing vias<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Oscillator instability or startup failure<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Same-layer routing, &lt; 5 mm, guard ring<\/td>\n      <\/tr>\n      <tr style=\"background: #1e1b2e\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44;color: #f9a8d4;font-weight: 500\">RX center tap connected to 3.3V (same as TX)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">RX input DC bias error; no link or corrupted RX<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">RCT \u2192 0.1 \u00b5F \u2192 GND for W5500 specifically<\/td>\n      <\/tr>\n      <tr style=\"background: #0f0f1a\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44;color: #f9a8d4;font-weight: 500\">GND split plane under transformer<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Compromised isolation; common-mode noise<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Maintain isolation zone; chassis GND via 1 nF\/200V cap only<\/td>\n      <\/tr>\n      <tr style=\"background: #1e1b2e\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44;color: #f9a8d4;font-weight: 500\">VBG (pin 18) connected to GND or any net<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Internal bandgap reference disturbed; chip malfunction<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #2d2b44\">Float VBG \u2014 do not connect to any net<\/td>\n      <\/tr>\n      <tr style=\"background: #0f0f1a\">\n        <td style=\"padding: 16px 20px;color: #f9a8d4;font-weight: 500\">RSVD pins left floating<\/td>\n        <td style=\"padding: 16px 20px\">Undefined chip state<\/td>\n        <td style=\"padding: 16px 20px\">Tie all RSVD pins to GND<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"troubleshooting_common_issues\"><\/span><strong>Troubleshooting &amp; Common Issues<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>SPI Communication Checklist<\/strong><\/h3>\n\n\n\n<p>Before attempting any network connection, always verify the SPI communication is working correctly by reading the VERSIONR register \u2014 it must return 0x04.<a href=\"https:\/\/cdn.sparkfun.com\/datasheets\/Dev\/Arduino\/Shields\/W5500_datasheet_v1.0.2_1.pdf\"> <\/a>If it does not, every subsequent register read and write is meaningless.<\/p>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0a0e17;color: #e5e7eb;font-size: 15px;border-radius: 10px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #3b82f6, #1d4ed8)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #1e40af;font-weight: 600;color: white\">Symptom<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #1e40af;font-weight: 600;color: white\">Likely Cause<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #1e40af;font-weight: 600;color: white\">Diagnostic Fix<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #bfdbfe;font-weight: 500\">VERSIONR returns 0xFF<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">SPI MISO floating \u2014 CS never asserted, or chip unpowered<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Confirm VCC = 3.3V, measure voltage on pin 28; scope SCSn to verify it goes LOW<\/td>\n      <\/tr>\n      <tr style=\"background: #0a0e17\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #bfdbfe;font-weight: 500\">VERSIONR returns 0x00<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">MOSI\/MISO swapped, or SCSn stuck LOW permanently<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Swap MOSI\/MISO; verify SCSn is driven from MCU GPIO, not tied to GND<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #bfdbfe;font-weight: 500\">VERSIONR returns a non-0x04 value<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">SPI clock mode mismatch<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Set host SPI to Mode 0 (CPOL=0, CPHA=0) \u2014 the most common misconfiguration<\/td>\n      <\/tr>\n      <tr style=\"background: #0a0e17\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #bfdbfe;font-weight: 500\">All registers read back 0x00<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">RSTn not released, or 50 ms wait omitted<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Verify RSTn is HIGH after reset; add delay_ms(50) before first SPI transaction<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #bfdbfe;font-weight: 500\">Data correct at 4 MHz, corrupted at higher speeds<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Excessive SPI trace length or capacitance<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Test at 4 MHz first; once confirmed working, increase clock; keep SPI traces &lt; 5 cm<\/td>\n      <\/tr>\n      <tr style=\"background: #0a0e17\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #bfdbfe;font-weight: 500\">Reads correct once, then garbage<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">CS deasserted between Address and Data phases<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Ensure SCSn stays LOW for the entire 3-phase frame \u2014 deassert only after final data byte<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;color: #bfdbfe;font-weight: 500\">W5500 works, then stops after MCU reset<\/td>\n        <td style=\"padding: 16px 20px\">W5500 not hardware-reset on MCU reboot<\/td>\n        <td style=\"padding: 16px 20px\">Drive RSTn LOW on MCU startup routine \u2014 do not rely on W5500 power-on reset alone<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Systematic first-contact debug procedure:<\/strong><\/h4>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\n\/\/ Step 1 \u2014 verify power\n\n\/\/ Measure pin 28 (VDD): must be 3.3V \u00b1 5%\n\n\/\/ Measure pin 4 (AVDD): must be 3.3V \u00b1 5%\n\n\/\/ Step 2 \u2014 release reset and wait\n\nGPIO_SetPin(RST_PIN); \u00a0 \/\/ RSTn = HIGH\n\ndelay_ms(50);\n\n\/\/ Step 3 \u2014 read VERSIONR\n\nuint8_t ver = w5500_read_byte(0x0039, 0x00);\u00a0 \/\/ BSB=Common, RWB=Read\n\n\/\/ Expected: 0x04\n\n\/\/ Got 0xFF \u2192 SPI hardware issue\n\n\/\/ Got 0x00 \u2192 MOSI\/MISO swapped or Mode mismatch\n\n\/\/ Got 0x04 \u2192 SPI is working \u2014 proceed to network config\n<\/pre><\/div>\n\n\n<h3 class=\"wp-block-heading\"><strong>No Ethernet Link<\/strong><\/h3>\n\n\n\n<p>Check PHY LINK \u2014 bit 0 of PHYCFGR register at address 0x002E \u2014 before attempting any socket operation.<a href=\"https:\/\/cdn.sparkfun.com\/datasheets\/Dev\/Arduino\/Shields\/W5500_datasheet_v1.0.2_1.pdf\"> <\/a>PHYCFGR_LNK_ON is defined as bit 0 = 1 (link established); PHYCFGR_LNK_OFF is bit 0 = 0 (no link).<a href=\"https:\/\/shop.wiznet.eu\/w5500.html\">&nbsp;<\/a><\/p>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\nuint8_t phycfgr = w5500_read_byte(0x002E, 0x00);\n\n\/\/ Bit 0 = LNK: 1 = link up, 0 = no link\n\n\/\/ Bit 1 = SPD: 1 = 100 Mbps, 0 = 10 Mbps\n\n\/\/ Bit 2 = DPX: 1 = full duplex, 0 = half duplex\n\nif (phycfgr &amp; 0x01) {\n\n\u00a0\u00a0\u00a0\u00a0\/\/ Link established \u2014 proceed\n\n} else {\n\n\u00a0\u00a0\u00a0\u00a0\/\/ No link \u2014 use checklist below\n\n}\n<\/pre><\/div>\n\n\n<h4 class=\"wp-block-heading\"><strong>No-link hardware diagnostic sequence:<\/strong><\/h4>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0f1419;color: #d1d5db;font-size: 15px;border-radius: 10px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #10b981, #047857)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #065f46;font-weight: 600;color: white\">Check<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #065f46;font-weight: 600;color: white\">Method<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #065f46;font-weight: 600;color: white\">Expected Result<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #6ee7b7;font-weight: 500\">Ethernet cable<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Swap with known-good cable<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Link LED should illuminate<\/td>\n      <\/tr>\n      <tr style=\"background: #0f1419\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #6ee7b7;font-weight: 500\">Switch port<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Plug into different port<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Link LED should illuminate<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #6ee7b7;font-weight: 500\">25 MHz crystal<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Oscilloscope probe on XI\/CLKIN (pin 30)<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">25 MHz sinusoidal waveform present<\/td>\n      <\/tr>\n      <tr style=\"background: #0f1419\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #6ee7b7;font-weight: 500\">TX differential pair<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Check TXP\/TXN with oscilloscope when sending<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Differential signal present during transmit<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #6ee7b7;font-weight: 500\">Transformer wiring<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Verify against WIZnet reference schematic<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">TXP\u2192TX+ winding, TXN\u2192TX\u2212 winding, not swapped<\/td>\n      <\/tr>\n      <tr style=\"background: #0f1419\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937;color: #6ee7b7;font-weight: 500\">EXRES1 resistor<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Measure resistance between pin 10 and AGND<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #1f2937\">Must read 12.4 k\u03a9 \u00b11%<\/td>\n      <\/tr>\n      <tr style=\"background: #111827\">\n        <td style=\"padding: 16px 20px;color: #6ee7b7;font-weight: 500\">RCT center tap<\/td>\n        <td style=\"padding: 16px 20px\">Verify 0.1 \u00b5F capacitor to GND on RX center tap<\/td>\n        <td style=\"padding: 16px 20px\">Not connected to 3.3V \u2014 W5500 is Current Mode RX<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<p><strong>Most common cause of no-link in new designs:<\/strong> The differential pairs for TX and RX were swapped at the transformer. The pin layout of your RJ45\/Transformer Module must be verified and compared against the relevant W5500 pin numbers for TXP and TXN. The second most frequent cause of a problem is having a missing EXRES1 or using the wrong value resistor because the value of the EXRES1 should be 12.4 k\u03a9 \u00b11%.<\/p>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>DHCP &amp; IP Configuration Failures<\/strong><\/h3>\n\n\n\n<p>The W5500 contains no on-chip DHCP client. DHCP must be implemented entirely in host firmware using a UDP socket. If you are using the Arduino Ethernet library, it calls Ethernet.begin(mac) which runs a software DHCP client internally \u2014 the W5500 itself is transparent to this process.<\/p>\n\n\n\n<div style=\"font-family: -apple-system, BlinkMacOSystemFont, 'Segoe UI', Roboto, sans-serif;max-width: 100%\">\n  <table style=\"width:100%;border-collapse: collapse;background: #0f172a;color: #e2e8f0;font-size: 15px;border-radius: 10px;overflow: hidden\">\n    <thead>\n      <tr style=\"background: linear-gradient(135deg, #8b5cf6, #7c3aed)\">\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #6d28d9;font-weight: 600;color: white\">Symptom<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #6d28d9;font-weight: 600;color: white\">Likely Cause<\/th>\n        <th style=\"padding: 16px 20px;text-align: left;border-bottom: 2px solid #6d28d9;font-weight: 600;color: white\">Fix<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #c4b5fd;font-weight: 500\">DHCP never completes<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">No Ethernet link<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Resolve link issue first (Section 8.2)<\/td>\n      <\/tr>\n      <tr style=\"background: #0f172a\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #c4b5fd;font-weight: 500\">DHCP fails with link up<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Duplicate MAC on network<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Change last 3 bytes of SHAR to a unique value<\/td>\n      <\/tr>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #c4b5fd;font-weight: 500\">DHCP assigned 169.254.x.x<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">APIPA fallback \u2014 DHCP server not responding<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Verify DHCP server is reachable; check VLAN\/subnet configuration<\/td>\n      <\/tr>\n      <tr style=\"background: #0f172a\">\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155;color: #c4b5fd;font-weight: 500\">Correct IP assigned, no TCP connections<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Gateway IP (GAR) wrong<\/td>\n        <td style=\"padding: 16px 20px;border-bottom: 1px solid #334155\">Verify GAR matches router IP; check subnet mask (SUBR)<\/td>\n      <\/tr>\n      <tr style=\"background: #1e293b\">\n        <td style=\"padding: 16px 20px;color: #c4b5fd;font-weight: 500\">Static IP set, no ARP response<\/td>\n        <td style=\"padding: 16px 20px\">Wrong write sequence<\/td>\n        <td style=\"padding: 16px 20px\">Write GAR \u2192 SUBR \u2192 SIPR in that order before opening any socket<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n<\/div>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Correct static IP initialization sequence:<\/strong><\/h4>\n\n\n<div class=\"wp-block-syntaxhighlighter-code \"><pre class=\"brush: cpp; title: ; notranslate\" title=\"\">\nuint8_t gw&#x5B;4]\u00a0 = {192, 168, 1, 1};\u00a0 \u00a0 \/\/ Gateway\n\nuint8_t sn&#x5B;4]\u00a0 = {255, 255, 255, 0};\u00a0 \/\/ Subnet mask\n\nuint8_t ip&#x5B;4]\u00a0 = {192, 168, 1, 100};\u00a0 \/\/ Device IP\n\nuint8_t mac&#x5B;6] = {0x00, 0x08, 0xDC, 0x01, 0x02, 0x03}; \/\/ Unique MAC\n\n\/\/ Control byte for Common Register write: BSB=00000, RWB=1, OM=00 \u2192 0x04\n\nw5500_write_burst(0x0009, 0x04, mac, 6);\u00a0 \/\/ SHAR\n\nw5500_write_burst(0x0001, 0x04, gw,\u00a0 4);\u00a0 \/\/ GAR\n\nw5500_write_burst(0x0005, 0x04, sn,\u00a0 4);\u00a0 \/\/ SUBR\n\nw5500_write_burst(0x000F, 0x04, ip,\u00a0 4);\u00a0 \/\/ SIPR\n\n\/\/ Only open sockets AFTER all network config is written\n<\/pre><\/div>\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"w5500_vs_alternatives_%e2%80%94_market_context\"><\/span><strong>W5500 vs Alternatives \u2014 Market Context<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>Comparison Table<\/strong><\/h3>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:1200px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:12px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:22%\">Feature<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:13%\">W5500<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:13%\">W5100S<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:13%\">ENC28J60<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:13%\">LAN8720A<\/th>\n        <th style=\"padding:12px 14px;text-align:center;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:13%\">W6100<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">Vendor<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">WIZnet<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">WIZnet<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">Microchip<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">Microchip<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">WIZnet<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">TCP\/IP Stack<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Hardwired (on-chip)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Hardwired (on-chip)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#dc2626\">Software (host MCU)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">None (PHY only)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Hardwired (on-chip)<\/td>\n      <\/tr>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">Max Sockets<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">8<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">4<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#dc2626\">1 (software managed)<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">MCU-dependent<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">8<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">Ethernet Speed<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">10\/100 Mbps<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">10\/100 Mbps<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#dc2626\">10 Mbps only<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">10\/100 Mbps<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">10\/100 Mbps<\/td>\n      <\/tr>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">Host Interface<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">SPI up to 80 MHz<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SPI up to 70 MHz<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">SPI up to 20 MHz<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#0d9488\">RMII<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">SPI \/ Fast SPI<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">IPv6 Support<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">No<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">No<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">No<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#6b7280\">Depends on MCU stack<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Yes (IPv4 + IPv6)<\/td>\n      <\/tr>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">MCU CPU Load<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Very low \u2014 offloaded<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Very low \u2014 offloaded<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#dc2626\">High \u2014 full stack on MCU<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#d97706\">Medium \u2014 MAC on MCU<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Very low \u2014 offloaded<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">Firmware Complexity<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Low \u2014 socket commands<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Low \u2014 socket commands<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#dc2626\">High \u2014 lwIP or UIPEthernet<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#d97706\">Medium \u2014 RMII integration<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Low \u2014 socket commands<\/td>\n      <\/tr>\n      <tr style=\"background:#ecfdf5\">\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">Operating Temperature<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">\u221240\u00b0C to +85\u00b0C<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">\u221240\u00b0C to +85\u00b0C<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#dc2626\">0\u00b0C to +70\u00b0C<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">\u221240\u00b0C to +85\u00b0C<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb\">\u221240\u00b0C to +85\u00b0C<\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:11px 14px;font-weight:500;border-bottom:1px solid #e5e7eb\">Best For<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857;font-weight:600\">IoT, industrial, new designs<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857\">Low-cost 4-socket apps<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#dc2626\">Ultra-low-cost, MCU has spare cycles<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#0d9488\">STM32\/ESP32 with built-in MAC<\/td>\n        <td style=\"padding:11px 14px;text-align:center;border-bottom:1px solid #e5e7eb;color:#047857;font-weight:600\">IPv6 requirements, future-proofing<\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#f9fafb;border-top:1px solid #e5e7eb;font-size:0.88rem;color:#4b5563;flex-wrap:wrap;gap:16px;align-items:center\">\n    <strong style=\"color:#111827;margin-right:4px\">Color key:<\/strong>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#047857;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#047857;font-weight:600\">Emerald<\/span> \u2014 WIZnet hardwired ICs<\/span>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#0d9488;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#0d9488;font-weight:600\">Teal<\/span> \u2014 PHY \/ high-integration solutions<\/span>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#dc2626;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#dc2626;font-weight:600\">Red<\/span> \u2014 Limitations \/ trade-offs<\/span>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#d97706;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#d97706;font-weight:600\">Amber<\/span> \u2014 Medium complexity<\/span>\n  <\/div>\n<\/div>\n\n\n\n<h3 class=\"wp-block-heading\"><strong>When Each IC Is the Right Choice<\/strong><\/h3>\n\n\n\n<p>The W5500 is the best choice for any new design that needs multiple connections at once, an industrial operating range, or least intervention of the host MCU for networking. This device is WIZnet\u2019s current production recommendation and is the most widely supported IC for Arduino, MicroPython, and C programming.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>ENC28J60<\/strong><\/h4>\n\n\n\n<p><strong>ENC28J60<\/strong> may be used if the only major factor dictating your decision is how much you can save on the cost of the ENC28J60, and if the host&#8217;s MCU has enough spare capacity for processing power and RAM to accommodate a software TCPIP stack ( lwIP \/ UIPEthernet ). Choosing the ENC28J60 is also not recommended. It is limited to 10 Mbps, has a history of instability, and should not be used in any new designs using BSP32 ( ESP32 ) microcontrollers. The ENC28J60 can operate between 0\u00b0C and 70\u00b0C, which also excludes it from usage within industrial applications.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>LAN8720A<\/strong><\/h4>\n\n\n\n<p><strong><a href=\"https:\/\/www.flywing-tech.com\/search\/LAN8720A\">LAN8720A<\/a><\/strong> should be selected when the host&#8217;s MCU has an integrated Ethernet MAC with an RMII interface (typically found within STM32F4\/F7\/H7 series micros, and variants of ESP32). When using ESP32, the built-in MCU MAC will communicate directly to the LAN8720A via the RMII interface using the TCPIP stack ( lwIP ) built into the MCU, producing much greater throughput than using an external controller, but requires additional clock cycles consumed within the operation of the protocol processing functions on the MCU.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>W6100<\/strong><\/h4>\n\n\n\n<p><strong><a href=\"https:\/\/www.flywing-tech.com\/product-detail\/rf-antennas-pulselarsen-antennas-w6100-bc375a1b\">W6100<\/a><\/strong> should be considered if you have stringent requirements to use both IPv6 and IPv4 within your network. In addition, the W6100 has has both IPv4 and IPv6 capabilities, for both dual-speed 10 \/ 100 Ethernet communications and a hard-wired stack comm architecture similar to the W5500 Ethernet controller, providing a good upgrade path for W5500 designs that may need to add IPv6 capability without the need to change their code base.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"conclusion\"><\/span><strong>Conclusion<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<p>The <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a> is a well-established and well-supported hardwired TCP\/IP solution that remains the only viable choice for the vast majority of new IoT and industrial design projects. The eight-socket design, 80 MHz SPI bus with burst mode support, 32 KB buffer memory, and -40\u00b0C to 85\u00b0C operating temperature range make the W5500 suitable for a wide range of applications from a single sensor node using MQTT to a multi-protocol industrial gateway that supports simultaneous use of MQTT, Modbus\/TCP, HTTP, DNS, and SNTP.<\/p>\n\n\n\n<h4 class=\"wp-block-heading\"><strong>Decision matrix for final IC selection:<\/strong><\/h4>\n\n\n\n<div style=\"max-width:1200px;margin:2.5rem auto;background:white;border-radius:12px;border:1px solid #e5e7eb;overflow:hidden\">\n  <table style=\"width:100%;border-collapse:collapse;font-family:'Segoe UI',system-ui,sans-serif;font-size:0.93rem;color:#111827;min-width:800px\">\n    <thead>\n      <tr style=\"background:#1f2937;color:white\">\n        <th style=\"padding:10px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151;width:45%\">Your Requirement<\/th>\n        <th style=\"padding:10px 14px;text-align:left;font-weight:600;text-transform:uppercase;letter-spacing:0.4px;font-size:0.85rem;border-bottom:2px solid #374151\">Recommended IC<\/th>\n      <\/tr>\n    <\/thead>\n    <tbody>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb\">New design, any socket count, IoT or industrial<\/td>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb;font-weight:500;color:#6d28d9\">\n          W5500 \u2014 best all-round specification\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb\">Existing W5100 product, drop-in replacement<\/td>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb;font-weight:500;color:#6d28d9\">\n          W5100S \u2014 firmware-compatible, same 7\u00d77 mm footprint\n        <\/td>\n      <\/tr>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb\">Ultra-low BOM cost, MCU has spare cycles<\/td>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb;font-weight:500;color:#6d28d9\">\n          ENC28J60 \u2014 but accept 10 Mbps ceiling and stability trade-offs\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb\">MCU has built-in Ethernet MAC (STM32F4, ESP32)<\/td>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb;font-weight:500;color:#0d9488\">\n          LAN8720A \u2014 RMII eliminates external stack entirely\n        <\/td>\n      <\/tr>\n      <tr style=\"background:#f3e8ff\">\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb\">IPv6 required now or in near future<\/td>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb;font-weight:500;color:#6d28d9\">\n          W6100 \u2014 direct W5500 successor with dual-stack hardwired TCP\/IP\n        <\/td>\n      <\/tr>\n      <tr>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb\">Maximum raw throughput (&gt; 25 Mbps embedded)<\/td>\n        <td style=\"padding:12px 14px;border-bottom:1px solid #e5e7eb;font-weight:500;color:#0d9488\">\n          LAN8720A + MCU MAC + lwIP \u2014 only path beyond W5500 SPI ceiling\n        <\/td>\n      <\/tr>\n    <\/tbody>\n  <\/table>\n\n  <div style=\"padding:14px 20px;background:#f9fafb;border-top:1px solid #e5e7eb;font-size:0.88rem;color:#4b5563;flex-wrap:wrap;gap:16px;align-items:center\">\n    <strong style=\"color:#111827;margin-right:4px\">Color key:<\/strong>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#6d28d9;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#6d28d9;font-weight:600\">Indigo<\/span> \u2014 WIZnet hardwired solutions<\/span>\n    <span><span style=\"width:10px;height:10px;border-radius:50%;background:#0d9488;margin-right:5px;vertical-align:middle\"><\/span><span style=\"color:#0d9488;font-weight:600\">Teal<\/span> \u2014 PHY-only \/ high-performance paths<\/span>\n  <\/div>\n<\/div>\n\n\n\n<p>The architecture of <a href=\"https:\/\/www.flywing-tech.com\/product-detail\/interface-controllers-wiznet-w5500-b0825ae1\">W5500<\/a>, including pinout, SPI protocol, register map, PCB layout, and IoT integration, represents a complete understanding of implementation that is required for taking a product from schematic capture through firmware development into production. The referenced specifications are all based on the <a href=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/W5500_ds_v110e.pdf\">WIZnet W5500 Datasheet<\/a> v1.1.0, ioLibrary_Driver source, and application notes provided by WIZnet.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\"><span class=\"ez-toc-section\" id=\"frequently_asked_questions\"><\/span><strong>Frequently Asked Questions<\/strong><span class=\"ez-toc-section-end\"><\/span><\/h2>\n\n\n\n<div class=\"schema-faq wp-block-yoast-faq-block\"><div class=\"schema-faq-section\" id=\"faq-question-1773573230113\"><strong class=\"schema-faq-question\"><strong>Q1: Does the W5500 support UDP?<\/strong><\/strong> <p class=\"schema-faq-answer\">The <strong>W5500<\/strong> supports UDP on its eight sockets (including multicast and broadcast), but since it does not support IP fragmentation, the UDP payload must be <strong>1472 bytes or less<\/strong>.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1773578985011\"><strong class=\"schema-faq-question\"><strong>Q2: Does the W5500 support SSL\/TLS?<\/strong><\/strong> <p class=\"schema-faq-answer\">The <strong>W5500<\/strong> has no built-in TLS support, so encryption must be handled in the host MCU using libraries like <strong>mbedTLS<\/strong> or <strong>wolfSSL<\/strong>, requiring about <strong>50 kB SRAM<\/strong>.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1773579030162\"><strong class=\"schema-faq-question\"><strong>Q3: What is the maximum throughput of the W5500?<\/strong><\/strong> <p class=\"schema-faq-answer\">The <strong>W5500<\/strong> supports a 10\/100 Mbps PHY, but actual TCP throughput is typically <strong>15\u201325 Mbps<\/strong> and depends mainly on SPI speed and buffer handling rather than the PHY itself.<\/p> <\/div> <div class=\"schema-faq-section\" id=\"faq-question-1773579044130\"><strong class=\"schema-faq-question\"><strong>Q4: Can the W5500 work directly with a 5V Arduino?<\/strong><\/strong> <p class=\"schema-faq-answer\">The <strong>W5500<\/strong> runs on <strong>3.3V power<\/strong> but tolerates <strong>5V logic on SPI pins<\/strong>, though its VCC must never exceed <strong>3.3V<\/strong>.<\/p> <\/div> <\/div>\n\n\n\n<figure class=\"wp-block-image size-full\"><a href=\"https:\/\/www.flywing-tech.com\/category\/integrated-circuits-ics\/interface-controllers-edfba839\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"2160\" height=\"798\" src=\"https:\/\/www.flywing-tech.com\/blog\/wp-content\/uploads\/2026\/03\/interface-controllers-for-reliable-system-communication.png\" alt=\"interface controller ICs used to manage communication between processors, peripherals, and external devices in embedded and industrial electronic systems.\" class=\"wp-image-8036\" \/><\/a><\/figure>\n<\/div>","protected":false},"excerpt":{"rendered":"<p>What Is the W5500 Ethernet Controller IC? The W5500 Ethernet Controller IC is a hardwired TCP\/IP embedded Ethernet controller from WIZnet. It combines a complete TCP\/IP stack, a 10\/100 Ethernet MAC, and a PHY in a single chip. It provides a means of direct Internet connection for microcontrollers through a high-speed SPI interface running at [&hellip;]<\/p>\n","protected":false},"author":6,"featured_media":8033,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[1071,377,378,380],"tags":[1074,1075,135,1073,1077,1078,1076,1072],"class_list":["post-7993","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-ethernet-controllers","category-experience-sharing","category-parts-library","category-technical-tutorial","tag-ethernet-controller","tag-hardwired-tcp-ip","tag-spi-interface","tag-w5500","tag-w5500-datasheet","tag-w5500-pcb-layout","tag-w5500-pinout","tag-wiznet-w5500"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v26.3 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\r\n<title>W5500 Ethernet Controller IC: Complete Guide to Pinout, SPI Protocol, PCB Design &amp; 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We aim to share valuable insights on electronic components, industry trends, and practical engineering guides to support global developers and buyers.","sameAs":["https:\/\/www.flywing-tech.com\/blog\/"],"url":"https:\/\/www.flywing-tech.com\/blog\/author\/content_manager_03\/"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773573230113","position":1,"url":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773573230113","name":"Q1: Does the W5500 support UDP?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"The <strong>W5500<\/strong> supports UDP on its eight sockets (including multicast and broadcast), but since it does not support IP fragmentation, the UDP payload must be <strong>1472 bytes or less<\/strong>.","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773578985011","position":2,"url":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773578985011","name":"Q2: Does the W5500 support SSL\/TLS?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"The <strong>W5500<\/strong> has no built-in TLS support, so encryption must be handled in the host MCU using libraries like <strong>mbedTLS<\/strong> or <strong>wolfSSL<\/strong>, requiring about <strong>50 kB SRAM<\/strong>.","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773579030162","position":3,"url":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773579030162","name":"Q3: What is the maximum throughput of the W5500?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"The <strong>W5500<\/strong> supports a 10\/100 Mbps PHY, but actual TCP throughput is typically <strong>15\u201325 Mbps<\/strong> and depends mainly on SPI speed and buffer handling rather than the PHY itself.","inLanguage":"en-US"},"inLanguage":"en-US"},{"@type":"Question","@id":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773579044130","position":4,"url":"https:\/\/www.flywing-tech.com\/blog\/w5500-ethernet-controller-ic-complete-guide-to-pinout-spi-protocol-pcb-design-iot-applications\/#faq-question-1773579044130","name":"Q4: Can the W5500 work directly with a 5V Arduino?","answerCount":1,"acceptedAnswer":{"@type":"Answer","text":"The <strong>W5500<\/strong> runs on <strong>3.3V power<\/strong> but tolerates <strong>5V logic on SPI pins<\/strong>, though its VCC must never exceed <strong>3.3V<\/strong>.","inLanguage":"en-US"},"inLanguage":"en-US"}]}},"_links":{"self":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts\/7993","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/users\/6"}],"replies":[{"embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/comments?post=7993"}],"version-history":[{"count":25,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts\/7993\/revisions"}],"predecessor-version":[{"id":8037,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/posts\/7993\/revisions\/8037"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/media\/8033"}],"wp:attachment":[{"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/media?parent=7993"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/categories?post=7993"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.flywing-tech.com\/blog\/wp-json\/wp\/v2\/tags?post=7993"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}